2 Replies Latest reply on Sep 21, 2017 10:49 PM by user_246598725

    XXX_CtrlReg_Sync_ctrl_reg__CONTROL_REG undeclared when UDB document contains a Control Register

    user_65759023

      I am trying to create a custom UDB component in PSoC Creator 4.1 Update 1. Everything works until I add a control register block into the UDB schematic. When I try to compile the project I get the following error message:

       

      --------------- Build Started: 09/20/2017 19:06:17 Project: udb_test, Configuration: ARM GCC 5.4-2016-q2-update Debug ---------------

      The code generation step is up to date.

      arm-none-eabi-gcc.exe -mcpu=cortex-m3 -mthumb -I. -IGenerated_Source\PSoC5 -Wa,-alh=.\CortexM3\ARM_GCC_541\Debug/cic_1_CtrlReg.lst -g -D DEBUG -D CY_CORE_ID=0 -Wall -ffunction-sections -ffat-lto-objects -Og -c Generated_Source\PSoC5\cic_1_CtrlReg.c -o .\CortexM3\ARM_GCC_541\Debug\cic_1_CtrlReg.o

      In file included from Generated_Source\PSoC5\cic_1_CtrlReg.c:17:0:

      Generated_Source\PSoC5\cic_1_CtrlReg.c: In function 'cic_1_CtrlReg_Write':

      Generated_Source\PSoC5\cic_1_CtrlReg.h:61:50: error: 'cic_1_CtrlReg_Sync_ctrl_reg__CONTROL_REG' undeclared (first use in this function)

      #define cic_1_CtrlReg_Control        (* (reg8 *) cic_1_CtrlReg_Sync_ctrl_reg__CONTROL_REG )

                                                        ^

      Generated_Source\PSoC5\cic_1_CtrlReg.c:39:5: note: in expansion of macro 'cic_1_CtrlReg_Control'

           cic_1_CtrlReg_Control = control;

           ^

      Generated_Source\PSoC5\cic_1_CtrlReg.h:61:50: note: each undeclared identifier is reported only once for each function it appears in

      #define cic_1_CtrlReg_Control        (* (reg8 *) cic_1_CtrlReg_Sync_ctrl_reg__CONTROL_REG )

                                                        ^

      Generated_Source\PSoC5\cic_1_CtrlReg.c:39:5: note: in expansion of macro 'cic_1_CtrlReg_Control'

           cic_1_CtrlReg_Control = control;

           ^

      Generated_Source\PSoC5\cic_1_CtrlReg.c: In function 'cic_1_CtrlReg_Read':

      Generated_Source\PSoC5\cic_1_CtrlReg.h:61:50: error: 'cic_1_CtrlReg_Sync_ctrl_reg__CONTROL_REG' undeclared (first use in this function)

      #define cic_1_CtrlReg_Control        (* (reg8 *) cic_1_CtrlReg_Sync_ctrl_reg__CONTROL_REG )

                                                        ^

      Generated_Source\PSoC5\cic_1_CtrlReg.c:59:12: note: in expansion of macro 'cic_1_CtrlReg_Control'

           return cic_1_CtrlReg_Control;

                  ^

      Generated_Source\PSoC5\cic_1_CtrlReg.c:60:1: warning: control reaches end of non-void function [-Wreturn-type]

      }

      ^

      The command 'arm-none-eabi-gcc.exe' failed with exit code '1'.

      --------------- Build Failed: 09/20/2017 19:06:17 ---------------

       

      It appears that the Control Register address is not defined. It is not externed in the .h file, therefore it has to be included in one of the two include files:

      cyfitter.h or cytypes.h (which it isn't).

       

      So where should this register be declared?

        • 1. Re: XXX_CtrlReg_Sync_ctrl_reg__CONTROL_REG undeclared when UDB document contains a Control Register
          bhwj

          Hi,

           

          Your component (CIC)has .cyudb and .v files associated with the component,In this case,, .v file is included/ overrides the .cyudb verilog code, so your .v file had no code at all .Hence the control register is not used at all .

           

          I did copy the code in verilog tab of .cyudb to your .v file and it does not throw the same error anymore .However some other errors appear as some variables they are not defined in the verilog code.

          • 2. Re: XXX_CtrlReg_Sync_ctrl_reg__CONTROL_REG undeclared when UDB document contains a Control Register
            user_246598725

            Hi,

             

            I've not looked at your project, but according to bhwj's answer you're using both Verilog and UDB editor for your component.

            Excerpt from "PSoC Creator Component Author guide", Rev. L, p36:

             

            Implementation Priority

            Note that for implementations using hardware such as schematic, UDB Editor or Verilog, PSoC

            Creator will use only one of these to make the component and will ignore the rest. The priority of

            these implementations is as follows.

            1. Verilog – Has the highest priority. Creator ignores UDB Editor or schematics in the component

            workspace.

            2. UDB Editor – Has higher priority than a schematic, but will be ignored if there is a Verilog file in

            the component workspace.

            3. Schematic – Has the lowest priority and will be ignored if either a Verilog or UDB Editor file is in

            the workspace.

             

            Regards,

             

            Ralf