2 Replies Latest reply on Sep 11, 2017 7:13 AM by user_279968365

    SAR_ADC_Seq component buffering

    user_279968365

      Dear all:

      I am working in a project using de SAR_ADC_Seq component on PSOC5. I need to measure several currents. I am using INA138 from TI which give a output current proportional to the current to be measured. Adding a resitor to the output of the INA138 converts the ouput to voltage so I can measure them with the SAR_ADC. I have 8 channels in the ADC to measure 8 different currents. INA138 recommends to buffering the output signals (see attached image) before the ADC. My question: should I use a these buffers before the SAR_ADC_Seq?

      The RL of the image in my system is 91K.

      I dont see any data on the datasheet about the input impedance of the SAR_ADC_Seq and not any topic similar to this on Cypress comunities/forum.

       

      If you need further details please do not hesitate to ask me.

      Thanks in advance,

      Joaquin.