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1. Re: Current consumption too high in sleep mode after migration to another device
AnkitaS_51 Sep 1, 2017 3:19 AM (in response to user_148813134)Can you please share your project with us
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2. Re: Current consumption too high in sleep mode after migration to another device
user_148813134 Sep 14, 2017 11:01 AM (in response to AnkitaS_51)The problem seems to be the usage of pin P15[0] and P15[1], in our case defined as resp. sclk en miso pins to an SPI interface. The mere fact that these pins are defined as such in the TopDesign / cydwr (even with external components removed from the PCB) causes these current leaks during sleep. Trying to alter the drive mode of these pins to 'high impedant analog' before entering sleep mode does not change this behaviour. Any suggestions anyone to solve this issue without a hardware redesign?
In attachment you'll find the project in which we simulated the problem. There is a pin named P15_0. When this pin is mapped to any free pin except P15[0] or P15[1] the current consumption in sleep is as expected. (ca. 6..8 µA). When rebuilding the project with this pin mapped on either P15[0] or P15[1], in any configuration (analog high impedant, digital input, digital output,...) the current consumption in sleep is above 100µA. Note the we removed all hardware components from our PCB in order to avoid leaks through these components.
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Empty3.cydsn.zip 2.4 MB
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3. Re: Current consumption too high in sleep mode after migration to another device
user_148813134 Feb 10, 2018 5:24 AM (in response to user_148813134)The problem is solved by adding following line of code just before entering sleep:
*(reg8 *)CYREG_PRT15_DR = 0x00;