1 Reply Latest reply on Aug 23, 2017 10:48 PM by raghuramh_86

    PMODE and VIO1 power domain


      This is really anoying, some days ago I already posted a question on the forums, now comming back to check for answer I find a completely changed forum layout and my question removed! What is this? Lots of other forum entries in the new layout have completely wrong date information and most of the links posted in comments are just dead.


      So here's my question again. I'm developing a bus powered FPGA design where I would like to startup FX3 with power domain VIO1 (GPIF) disabled. The FX3 should still bottup and establish USB connection with PC. On request of PC application, VIO1 power domain should be powered up and FPGA will be configured. This is to save power on the USB line. But the PMODE pins, which define the boot process are also on VIO1 power domain. How is that case handled? Is it possible to have VIO1 powered down and FX3 still able to read PMODE pins or must VIO1 always powered up?