8 Replies Latest reply on Dec 10, 2013 9:42 PM by lu.li

    How to set cy7c68013a endpoint2 work as quad buffers with 1024Bytes?

    lu.li

       I tried so many times to set cy7c68013a endpoint2 work as quad buffers with 1024Bytes to accomplish higher speed , but failed,my initial codes are as follow, the handbook just note to set bit SIZE in regester EP2CFG, is there something important be ingnored? Could somebody help me ?

         

       

         

       

         

      void TD_Init( void )

         

      { // Called once at startup

         

          CPUCS = 0x12; // CLKSPD[1:0]=10, for 48MHz operation, output CLKOUT

         

          //  FIFOPINPOLAR |= 0x03;

         

          SYNCDELAY;

         

          PINFLAGSAB = 0x08; // FLAGA - EP2EF

         

          SYNCDELAY;

         

      //    PINFLAGSCD = 0xE0; // FLAGD - EP6FF ??flag??

         

      //    SYNCDELAY;

         

          PORTACFG |= 0x80;

         

          SYNCDELAY;

         

          IFCONFIG = 0xE3; //1110 0011 for syncslave fifo

         

          SYNCDELAY;

         

        EP2CFG = 0xa8;        //1010  1000       //out 1024bytes, 4x, bulk 4<<<<<<<<<<<------

         

        SYNCDELAY;                    

         

        EP6CFG &= 0x7f;                // in 512 bytes, 4x, bulk 4???

         

        SYNCDELAY;              

         

        EP4CFG &= 0x7f;                //clear valid bit

         

        SYNCDELAY;                     

         

        EP8CFG &= 0x7f;                //clear valid bit

         

        SYNCDELAY;

         

        FIFORESET = 0x80;             // activate NAK-ALL to avoid race conditions

         

        SYNCDELAY;                    // see TRM section 15.14

         

        FIFORESET = 0x82;             // reset, FIFO 2

         

        SYNCDELAY;                    // 

         

        FIFORESET = 0x84;             // reset, FIFO 4

         

        SYNCDELAY;                    // 

         

        FIFORESET = 0x86;             // reset, FIFO 6

         

        SYNCDELAY;                    // 

         

        FIFORESET = 0x88;             // reset, FIFO 8

         

        SYNCDELAY;                    // 

         

        FIFORESET = 0x00;             // deactivate NAK-ALL

         

        // handle the case where we were already in AUTO mode...

         

        // ...for example: back to back firmware downloads...

         

        SYNCDELAY;                    // 

         

        EP2FIFOCFG = 0x00;            // AUTOOUT=0, WORDWIDE=1

         

        // core needs to see AUTOOUT=0 to AUTOOUT=1 switch to arm endp's

         

        SYNCDELAY;                    // 

         

        EP2FIFOCFG = 0x11;            // AUTOOUT=1, WORDWIDE=1

         

        SYNCDELAY;                    // 

         

        // enable dual autopointer feature

         

        AUTOPTRSETUP |= 0x01;

         

      }