10 Replies Latest reply on Sep 26, 2013 3:54 AM by user_78878863

    41xx fix. funct. SPI slave without SS



      I'm trying to implement a slave board with CY8C4125 (so, without UDB) that comunicate with a master board trough SPI. Obviously the PSoC4 is SPI slave. The master doesn't manage the SS signal ('cause it's a point-to-point connection with only one slave). The SCB block configured as SPI Slave needs it so I've tryed the Unconfigured mode with routed only MISO, MOSI and SCLK signals but it seems doesn't receive any packet from master.

      Is the SS signal fundamental so I must manage it or there are any workaround ?

      Thanks for replies


        • 1. Re: 41xx fix. funct. SPI slave without SS

          According to the TRM,  you would need to configure your SCB block to use "Motorola SPI" mode. That mode uses Slave Select as device select (so you need to pull it low), but it doesn't need it as frame marker (like the TI mode does).

          • 2. Re: 41xx fix. funct. SPI slave without SS

            I've tried to leave the SS signal always low that means a little pcb modification (now I don't have conenction on pcb for SS) but doesn't works. It seems necessary to leave the signal high normally and put it low when  frames comes out from SPI master. In that case the RX fifo of PSoC4's SPI slave is populated by master's frames and isr will rise conform module configuration. I was hoping that an high configuration device like PSoC could operate like others uC that doesn't need SS signal for SPI operations but it seems don't.


            • 3. Re: 41xx fix. funct. SPI slave without SS

              I think it should have been possible to connect the SS signal internally (to a 'digital 0'). There should be not need for PCB modification...


              Regarding the original problem: how is your SPI component configured? Or can you upload your project for us to look at? ("Create workspace bundle")

              • 4. Re: 41xx fix. funct. SPI slave without SS

                The PSoC4 41xx has no UDB so I must use SCB block for implementing SPI slave, that doesn't permit to route signals internally.

                I've tried also SCB in Unconfigured mode, routing out only MISO, MOSI and SCLK (not any SS) but it remains stuck and doesn't receive any master frame.



                • 5. Re: 41xx fix. funct. SPI slave without SS

                  Didn't think of the fixed function component :(


                  Apart from that: the TRM explicitely shows that for the Motorola mode, SS is not needed to start a data frame (look at page 94 in the PSoC 4 TRM). So it should work.


                  How do you determine that there is no data received?


                  Are you sure you have configured the proper SPI mode? (If not, the slave might miss the last bit and look like its stuck)

                  • 6. Re: 41xx fix. funct. SPI slave without SS

                    I've checked the TRM (Document No. 001-85634 Rev. *B) on pag 94 and the falling edge of SS is showed as start communication's trigger (see image attacched). What do you mean that SS is not needed to start a data frame ?

                    I've checked the communication functionality through PSoC Creator debugger, activate the debugging info of components spi (Debug-> Window->Componets) that shows me the internal registers, so I've checked on RX_FIFO_STATUS registry the entries nr. and was stuck on zero and for sure no interrupt was raised from spi (I've configured interrupt on rx trigger level, with level = 1 frame). When I wire SS signal on PSoC4, always goes right, fifo populated and interrupts raised.

                    • 7. Re: 41xx fix. funct. SPI slave without SS

                      I've received a response about this question from a Cypress distributor's FAE with Cypress response :


                      1) Yes, it is not possible to use the SPI(SCB) without SS pin because the communication between the master and slave is initiated only when slave pin goes low.

                       2)When you try connecting SS pin of SPI slave to logic zero level, SPI does not work because SPI master enables the slave by pulling SS pin low. It means that the high to low transition on SS pin is sensed and then slave is enabled. If you connect SS pin to logic zero level there is now way that slave is enabled and the communication does not work.


                      so SS is needed by SCB SPI slave module and there're no tricks to work without it. So the solution is put it on PSoC or leave 4100 to 4200 and use a spi slave with UDB and manage it internally.


                      • 8. Re: 41xx fix. funct. SPI slave without SS

                        What I meant is shown in the bottom picture - unfortunately you have snipped the interesting part. It shows that to transfer multiple bytes SS doesn't need to go high again. So SS isn't used as frame separator. The documentatioon is not really clear in that regard...


                        What you might try is a trick: connect SS to a pin controlled by the PSoC. Then you can pull it from high to low during startup (to initiate the transmission), and then leave it there. If the documentation is at least right in the regard of transferring mltiple bytes, then each byte send by the master should be read properly and put to the RX buffer.

                        • 9. Re: 41xx fix. funct. SPI slave without SS

                          Even if the next frames dosen't needs SS's falling edge, the first does.
                          With SCB blocks, the signals are directly connected to pins, without possibility of internal routing so I must connect externally but anyway, how can psoc as spi slave decide to pull SS down to generate to falling edge that activates spi shift reg. ? Maybe react on activity from SCLK signal but if SCB controls that pin, there's no possibility to attach to it e.g. an isr.

                          For that reasons the SS signal must (for my understanding) be managed by spi master and so be considered into pcb and if present also into connection cable.

                          More to this, if it's possible on slave and if the master, pcb or cable can't manage SS, put also the SCLK to another pin and attach to it an isr to monitor the clock activity and than, if something seems gonna be received and with correct timing, activate by itself the pin externally routed to SS. To accomplish that, it's necessary to implement a protocol that provides a start frame to signal to slave incoming communication (also with a dead time to leave salve to drive SS).

                          • 10. Re: 41xx fix. funct. SPI slave without SS
                                    My idea was to use a 1 bit control register, route it to a pin and the feed that pin to the SS signal pin. Then you can use the control register to start the first frame (after you have started the SPI slave component). Hopefully this would then allow to read all subsequent frames, without needing to handle SS anymore.