1 2 3 Previous Next 40 Replies Latest reply on May 1, 2015 3:41 AM by user_120900302

    Sequencing SAR ADC with greater than 2 channels and DMA


       Hi folks,


      I'm looking to DMA from the Sequencing SAR ADC to a results array. I have no problem with 2 channels, but once I go to more than 2 channels I only get the first 2 channel results repeated. I've gone over and over the DMA setup and I think it is correct but I must be missing something. I used this article www.cypress.com/ as a base to get the 2 channel setup working.


      I've written a minimum project (attached) that in my mind should work when the number of channels in the designer is changed. There are 2 results arrays; 1 which extracts the results from the ADC using the API GetResult16() function, and 1 which gets the results via DMA. If you put a breakpoint on the "DMADone = 0;" line in main.c you can compare the results in the two arrays. These are equivalent when sampling two channels...but any channels over that don't appear in the results. (I've set up a few different voltages on the input pins to test it).


      From reading the documentation I understand that the number of bytes in each DMA burst should be NumChannels * sizeof(uint16) to read all the results from the ADC_1_finalArray, and the TD should be set to be the number of results array elements * sizeof(uint16).


      I have the TD set such that the destination results array increments automatically, which from the DMA documentation I think should take the size of the number of bytes per burst into account. I wonder however, if this is incrementing correctly for two input channels but needs some adjustment for more channels than that.


      Any info and help would be much appreciated.



        • 1. Re: Sequencing SAR ADC with greater than 2 channels and DMA

           Well, I was nearly right...


          After playing about with this for a day and a half, I figured out my issue 5 minutes after sending the previous message...typical.


          As the ADC results are in an array of length NumChannels the source address must be incremented as well as the destination address. With regular, non-sequencing ADCs there is only one value stored at the output and so source address incrementing is not required.


          A working example with 6 inputs to the Sequencing ADC is attached for anyone else having issues.



          • 2. Re: Sequencing SAR ADC with greater than 2 channels and DMA

            Stephen, thank you for sharing your experiences with us!





            • 3. Re: Sequencing SAR ADC with greater than 2 channels and DMA

               It would appear my success was short-lived.


              After having succeeded in getting a single sample from each channel stored, I tried to get 2 samples from each channel stored in the one results array. For instance, previously my results array, let's say for 3 channels, was:


              DMAADCResultArray = [c1s1, c2s1, c3s1] (where c1 = channel 1, s1 = sample 1).


              What I would now like to achieve is:


              DMAADCResultArray = [c1s1, c2s1, c3s1, c1s2, c2s2, c3s2]


              However, because I overcame my previous difficulties by switching on source address incrementing in the TD for the DMA, the first three samples collect fine from ADC_SEQ_finalArray[0:2], but the DMA attempts to collect the next samples from ADC_SEQ_finalArray[3:5], which of course do not exist.


              Is there some way I can achieve what I want? As per my initial post I would have assumed that if I set BYTES_PER_REQUEST to 6 (numChans * sizeof(uint16)) and did not increment the DMA source address, that the 3 16-bit result values would be transferred.


              The sample project is attached. This is similar to previous except that a NumRepsToCapture define has been added which defines how many samples of each channel to transfer to the results array.


              If anything needs clarifying from above, let me know.



              • 4. Re: Sequencing SAR ADC with greater than 2 channels and DMA

                Cascaded DMA ?







                Regards, Dana.

                • 5. Re: Sequencing SAR ADC with greater than 2 channels and DMA

                   A DMA chain would probably do it Dana. I achieved the desired result using a chain of transfer descriptors within 1 DMA.


                  For instance, for a 6 channel input to the Sequencing ADC, I allocate 6 TDs in a DMA channel, each of which extracts and stores the results for 1 channel only.


                  I'm currently battling an issue whereby the DMA is only firing once. When I have figured out why this is so, I will post the project.

                  • 6. Re: Sequencing SAR ADC with greater than 2 channels and DMA

                     My issue with the DMA was a simple fact that I was not re-enabling the DMA after the TD chain had completed. I have set NEXT_TD to DMA_DISABLE_TD in the last TD in the chain.  Therefore I have added a call to CyDmaEnable to the statement where I detect the completion of a DMA transfer, which enabled the DMA again.


                    Alternatively I could have set the NEXT_TD for the last TD back to the first TD to keep the loop going but in my application there is a pause between data captures.


                    Project attached in case it might be useful for someone....6 channels being sampled into 6 destination arrays.

                    • 7. Re: Sequencing SAR ADC with greater than 2 channels and DMA

                       Hi folks,


                      I'm back with my recurrent issues of DMA'ing from the sequencing ADC.


                      It seems that a simple DMA from the sequencing ADC to a results array does not operate as I think it should. I've attached an example project where I have 6 channels into an ADC. A DMA channel is set up to copy the resulting samples from the ADC results array.


                      For comparison, when the DMA transfer is complete I use the Seq ADC API functions to copy sample results to another array. I also use memcpy to copy the results from the Seq ADC results array for a further comparison, as this most resembles the DMA transfer.


                      Both the memcpy and the API methods produce the correct final values. The DMA result produces two incorrect values repeated x 3.


                      I don't understand why the DMA doesn't work...I have it set to transfer 6 samples of size 2 bytes each from the ADC final results array...in my mind at least this is correct methodology.


                      If anyone could have a look at the attached minimal project and provide some insight I would be most grateful.





                      • 8. Re: Sequencing SAR ADC with greater than 2 channels and DMA

                         stephenf555, I think that my results will only confirm what you see.


                        I suspected that the debugger was not showing results in real time so I added an LCD to print out three elements of MEMCPYResultArray on the top row and the corresponding elements of ADC_SAR_Seq_1_finalArray on the bottom row in somewhat "real" time.


                        I changed the Pin_4 to appear on P6[5] which corresponds to the potentiometer on my CY8CKIT-050 Development Board. I also added two 2.7K resistors between Vdda and Vdds with their junction at P4[6].


                        I do see that the respective elements of the two arrays (row 1 and row 2) are identical.  Now, we would expect that when we rotate the pot, we would see its input vary from 0 to 4095 and the junction of P4[6] to remain constant. What I see instead is that rotating the pot causes all the inputs to vary widely.


                        Your problem seems similar to mine that I currently post on PSoC Creator forum.  Yesterday, I set up the sample project Filter_ADC_VDAC_poll with a music input on the ADC.  I was seeing a waveform on the oscilloscope that corresponded to the music even before applying power to the development board. The signal did get stronger when I applied power.


                        I am wondering if there is a current leakage somewhere in the PSoC 5.


                        My modification of your project is attached. Please check it for errors.

                        • 9. Re: Sequencing SAR ADC with greater than 2 channels and DMA

                          When you vary the pot are all the other inputs floating ? Real


                          test would be to tie them all to the pot. In any event floating


                          inputs will exhibit virtually any V in their CM range, all due


                          to coupling, noise......




                          Regards, Dana.

                          • 10. Re: Sequencing SAR ADC with greater than 2 channels and DMA

                             All the other inputs are floating except for the one I mentioned which has 1/2 Vdda as its input -- and it varied, too. I'll try it with the other inputs connected to the pot -- or perhaps a second pot. More to come.

                            • 11. Re: Sequencing SAR ADC with greater than 2 channels and DMA

                              In order to focus in on my problem, I created a simpler example. This project simply attempts a DMA from one array into another array, removing the ADC from the project entirely. This is the simplest example of what I am trying to achive.




                              In the source array I have 6 uint16 values, {1,2,3,4,5,6}.




                              The destination array is of length 6 uint16's.




                              I attempt a single DMA to move all the source array values to the destination array. BYTES_PER_REQUEST = 6*2. TRANSFER_COUNT = 6*2.




                              In my mind this DMA should transfer all the source array values to the destination array. However, what I get in the destination array is {1,2,0,0,0,0}.




                              Test project DMATest.cywrk.Archive01.zip attached.






                              Additional info:
                              If I add (though I didn't think it would be required) CY_DMA_TD_INC_DST_ADR to the TD configuration I then get:
                              DMADestinationArray = {1,2,1,2,1,2}




                              If I add CY_DMA_TD_INC_SRC_ADR to the TD I get the correct result:
                              DMADestinationArray = {1,2,3,4,5,6}




                              HOWEVER, this is fine if I only want this to happen once. Say I want to copy from the source array twice, into a destination array of length 12, without CPU interaction:
                              BYTES_PER_REQUEST = 6*2
                              TRANSFER_COUNT = 12*2




                              If I now have CY_DMA_TD_INC_SRC_ADR specified for the TD, on the second copy the DMA will attempt to read from sourceArray[6] which of course doesn't exist. If I don't specify CY_DMA_TD_INC_SRC_ADR I am back to my previous step and I end up with a destination array of {1,2,1,2,1,2,1,2,1,2,1,2}




                              Test project DMATest.cywrk.Archive02.zip attached.




                              Do I have to go down the road of indexed DMA to achieve what I want?

                              • 12. Re: Sequencing SAR ADC with greater than 2 channels and DMA

                                Not just indexed DMA, but you will need two DMAs to archive that. The first DMA retrieves a complete sample from 1 to 6 into an intermediate result, when restarted it will repeat from original source and destination address.


                                Second DMA retrieves from the intermediate and transfers 6 byted to the final address which is incremented.


                                There is an AppNote describing this and other techniques: www.cypress.com/





                                • 13. Re: Sequencing SAR ADC with greater than 2 channels and DMA

                                   Hi Bob,


                                  Thanks for your response.


                                  Your proposed approach had come to mind. But I fear that the second DMA will not work out as expected. As per my previous example, it doesn't seem possible to copy more than 2 samples repeatably from a source array into another array where the destination address is incrementing. When I tried this I could only manage to ge the first 2 samples repeated. See DMATest.cywrk.Archive02.zip from my previous post.


                                  Also, the DMA internal to the Seq ADC moves the results to a results array. So what is the first DMA in the proposed solution doing that isn't done already?


                                  I may be missing something key to the solution because I feel it must be possible.

                                  • 14. Re: Sequencing SAR ADC with greater than 2 channels and DMA

                                    Stephen, I'm still tinkering with your zip02 file but in the interest of getting back to you soon, here is something I found so far.


                                    After doing a clean & build I looked for the three arrays in the Results tab memory map file. They were not there.  So I moved them out of main{} and into global variables and removed the static specification. Now they appeared in high SRAM  at the following addresses: 


                                    0x1fff8144                DMAADCResultArray
                                    0x1fff8150                MEMCPYResultArray
                                    0x1fff815c                APIFUNResultArray


                                    This might or might not be part of the problem.


                                    Let me see if I understand the task correctly.  After the SAR's eoc signal lets us know that all six channels have been converted, we read the finalArray (we have only one chance to do this before a new round of conversions takes place). Let's say the six values are {1,2,3,4,5,6}.  We want to move them to a dimension 12 array twice to look like this: {1,2,3,4,5,6,1,2,3,4,5,6}. Do I understand correctly?



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