1 Reply Latest reply on Oct 28, 2014 12:32 PM by ArvindS_76

    Memory alignment

    StBa_721356

      What are the memory alignment restrictions with the BCM20736 and BCM20737?

      Is it allowed to do a 16-bit access on a not-16-bit-aligned address?

      Is it allowed to do a 32-bit access on a not-32-bit-aligned address?

      If not then is there a kind of exception handling for unaligned memory access and what are the performance penalties for this?

        • 1. Re: Memory alignment
          ArvindS_76

          The CPU core is an ARM Cortex M3 which supports unaligned accesses (so no exceptions will be thrown). However, there is a performance penalty - the instruction will take multiple cycles to complete and the pipeline will stall (see ARM documentation). Load/Store multiple instructions do not support unaligned accesses.

          1 of 1 people found this helpful