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The clock setup could be done using definitions in .../platforms/BCM943341WCD1/platform_config.h file.
The PLL_N_CONSTANT could be changed to 336 to set the system clock to be 168MHz. With released setup the PCLK1 would be 42MHz and the PCLK2 would be 84MHz. With this setup, the terminal UART baudrate needs to verified.
Following tool from ST may help to setup up the PLL for STM32F417 http://www.st.com/st-web-ui/static/active/en/st_prod_software_internet/resource/technical/software/utility/stsw-stm32090…