3 Replies Latest reply on Apr 9, 2010 6:20 PM by kurt.sanger

    Is 48MHz requried when running Keil Debugger with CY3684 EZ-USB Dev Brd?

    kurt.sanger
              I've tried setting the CPU clock to 12 MHz, 24 MHz, and 48 MHz. The debugger stops if the clock is not 48 MHz. I'm wondering if it must be 48 MHz for the COM port to function properly for the debugger? I'm changing the clock in TD_INIT.   
         
      The reason I'm trying lower clock rates is because I see 500 mV pk-pk noise on the 3.3V supply when running the GPIF at 48 MHz and the Clkout at 48 MHz. I wanted to see if the board was more stable at a slower rate?   
         
      Also at 48 MHz I never get EP2EF to go low when viewing EP2FIFOFLGs or EP24FIFOFLGs, and occasionally see EP2EF go low on EP2CS, and miss it once in a while on EP2468STAT. I have not yet tried the slower GPIF clock rate.   
         
      Hardware is Cy3684/3674 EZ-USB Advanced Development Board with CY7C68013A.   
      SW is Keil uVision2 V2.38j.   
      CyConsole is USB Console V1.5.1.1