5 Replies Latest reply on May 17, 2010 12:34 PM by philip.nielsen

    Cypress improvements for PSoc 3 and Psoc 5

    philip.nielsen

      I have had great experience with the PSoc 1 family. I understand we are still using Beta software for development. The PSoc 3 and PSoc 5 is basicaly not very user friendly. There is very few snippents of code sample in C. I tried to get better than 16 bit accuracy on the Psoc 3. It appears to be a board layout problem.

         

      I wish to continue with PSoc 3 and 5 SDKS. But is not very user friendly at this time. Is there any time in the future when the PSoc 3 and Psoc 5 will look like the Psoc 1 family.

         

       

         

      Thanks

         

       

         

      Philip

        • 1. Re: Cypress improvements for PSoc 3 and Psoc 5
          content.librarian

          Can you shed more light on what you like about PSoC 1 that you did not see in PSoC 3/5?

             

          Thanks!

          • 2. Re: Cypress improvements for PSoc 3 and Psoc 5
            philip.nielsen

            PSoc 1 is a very stable platform. I have built many projects from the CY827000 and the CY829000 series. These are greate PSoc devices. Example codes and snippets of code were available. It was user friendly.

               

            When I tried my PSoc 3 kit. I tried to use the 20 bit A/D module. I was able to get 2.999XXX volts. I discovered that the 8051 has an internal noise around 500uV. I spoke to a software engineer. He said the board layout was the main  problem. He was extremly helpful. My understanding is you will have a new test development board? Psoc 3 or PSoc 5 I am not sure. I have 16 bit DAQS from xzz company. I am looking to replace our 16 bit DAQ modules with a higher performance product. The PSoc technology fits the bill.

               

             

               

            I am waiting for the new PSoc 3 or Psoc 5 with a better than 16 bit resolution.

               

             

               

            Philip

            • 3. Re: Cypress improvements for PSoc 3 and Psoc 5
              content.librarian

              You can check out the new PSoC 1 CY8C28xxx series too. There is a blog post from Dave Van Ess on it http://www.cypress.com/?rID=40824.

                 

               

                 

              It is an enhanced family compared to the CY8C27xxx family, with dual analog muxes, 4 simultaneous DelSig ADCs (up to 14 bit), 2 x hardware I2C with address detection feature and a bunch of other improvements.

              • 4. Re: Cypress improvements for PSoc 3 and Psoc 5
                qvs

                Philip

                   

                I am assuming that you are using the CY8CKIT-001 for these measurements.

                   

                One of the major reasons for not achieving a good Signal to Noise ratio (SNR) is that the source voltage itself is noisy. So if you were using the potentiometer reference on the board, then I have to warn you that it could be extremely noisy. I would suggest that you use an external source which you know is not noisy.

                   

                Also as you suggested, the Layout of the board does contribute a lot to the analog performance. The CY8CKIT-001 being a generic development platform would not be the best one to test the analog performance above 17 bits.

                   

                But there is another kit from cypress that was designed for analog performance demonstration. Please find its description below.

                   

                http://www.cypress.com/?rID=39406

                   

                Also some other things you can do that can improve the analog performance in your project are as follows

                   

                1) The PSoC3/5 device has specific ports that are better choices for precision analog function than others. The prefered ports are port 0, port 3, port 4 and i would suggest you to use one of these ports.

                   

                2) Try not to have any other things in your design other than the ADC that is requried for the testing. This is because any additional functionality you add into your project, could be driving some pins, which could be adding noise into your analog signal due to the layout limitations of the board.

                   

                3) Also on the ADC, set the sample rate to a 100sps at 20 bit resolution so that you would eliminate the 50 Hz noise from teh power supplies.

                   

                If you can send me your email ID I will send you a project which you could try out. Sorry, I am not able to figure out a way to upload a project on the forum. :)

                   

                Regards

                   

                Kannan

                • 5. Re: Cypress improvements for PSoc 3 and Psoc 5
                  philip.nielsen

                  Thanks for the response. I used a 10.000 volt precision reference source from Analog devices. I tried 14 bit resolution and I saw the 500 uV noise also. I am waiting to resolve the A/D problem before I introduce the product as a viable alternate.

                     

                  pnielsen3@cox.net