11 Replies Latest reply on Mar 29, 2014 3:02 PM by user_275099341

    Datapath ALU input from Parallel Input (not A0 or A1)

    user_22393527

      Hi,

         

      I am trying to learn the datapath, verilog and the configuration tool.

         

      I can't work out how to get an input to the ALU from the parrallel in routed fabric. According to the PSoC 5 TRM, fig 23-6 (p.154)  and fig 23-25 (p170) there is a way to source the A input to the ALU from the parallel input routing. I've enabled CFB EN in the CFGRAM, and then selected PI SEL to PIN (register CFG15-14). What I can't work out is I never see PI in the drop down for SRCA in the CFGRAM section. Do I have to manually change it in the verilog file?  I have not been able to guess what the value is (e.g. `CS_SRCA_A0 is obviously A0).

         

      Thanks in advance.