>> My question is which pins I could use with 32bit FIFO to meet this demands?
depends on your needs. Do you need read and write transfers in slave fifo?
>> I think those pins are fully available when FIFO is configured - GPIO 23; GPIO 25; GPIO 26; GPIO 27; GPIO 45. Am I rigth?
yes. You may configure them with the IOMatrix function or the GpioOverride.
>> Is it possible to use I2S pins (GPIO 50-52; 57) as GPIO also?
yes it is possible. Just use the GpioOverride function of the FX3 SDK.
>> Is it any possibility to use SPI to meet the requirements of the third point?
If you reconfigure the GPIF between 16 and 32 bit fine to use hardware SPI, then you be able to use any GPIO pin for chip select and write protect lines of the two flash modules. Problems may if CS and WP has to be set while data is transferring through SPI. That means with the function Send-/Receive SPI you have a argument with byte count. If the flash module needs assertion and re-assertion of CS or WP for each transfer, then it takes longe time if you do all in single transfer mode. Because you have to use a GPIO set/clr to do CS and WP wich takes ~1micro second to set or clr.