1 Reply Latest reply on Nov 12, 2012 4:17 AM by content.librarian

    32bit FIFO + GPIO

    maciej.przybysz

      Hi all,

         

      I would like to use FX3 with FPGA. I need to provide fast data transfer, so I decided to use 32bit slave FIFO mode. However I have some doubts:

         

      1. First of all I'd like to boot from SPI flash. Here is first problem. 32bit FIFO can't be used with SPI. I assumed that it is possible to boot from SPI and then reconfigure device to 32bit FIFO. But what is happening with SPI lines then? Should I use WP# pin of flash to prevent unintended writing to memory?

         

      2. Furthermore, I'd like to have possibility of reconfiguring FPGA directly form FX3. I will use Spartan 6 Slave serial mode, so.. I need to drive M1 configuration line, reset FPGA and Slave Serial lines (CLOCK, SERIAL OUT, PROGRAM_B, INIT_B and DONE).

         

      3. That is not end of configuration possibilities which I would like to implement. FPGA wil boot from SPI flash by default. I'd like to be able to write that flash from FX3 directly. So another chip enable and write protect (?) lines are required. 

         

      My question is which pins I could use with 32bit FIFO to meet this demands?

         

      I think those pins are fully available when FIFO is configured - GPIO 23; GPIO 25; GPIO 26; GPIO 27; GPIO 45. Am I rigth?

         

       

         

      Is it possible to use I2S pins (GPIO 50-52; 57) as GPIO also?

         

      Is it any possibility to use SPI to meet the requirements of the third point?

         

      It is only conception, please make your suggestions - I would like to know if it is possible or not.

         

      Best regards

        • 1. Re: 32bit FIFO + GPIO
          content.librarian

          Hi mq~,

             

          >> My question is which pins I could use with 32bit FIFO to meet this demands?

             

          depends on your needs. Do you need read and write transfers in slave fifo?

             


           

             

          >> I think those pins are fully available when FIFO is configured - GPIO 23; GPIO 25; GPIO 26; GPIO 27; GPIO 45. Am I rigth?

             

          yes. You may configure them with the IOMatrix function or the GpioOverride.

             


           

             

          >> Is it possible to use I2S pins (GPIO 50-52; 57) as GPIO also?

             

          yes it is possible. Just use the GpioOverride function of the FX3 SDK.

             


           

             

          >> Is it any possibility to use SPI to meet the requirements of the third point?

             

          If you reconfigure the GPIF between 16 and 32 bit fine to use hardware SPI, then you be able to use any GPIO pin for chip select and write protect lines of the two flash modules. Problems may if CS and WP has to be set while data is transferring through SPI. That means with the function Send-/Receive SPI you have a argument with byte count. If the flash module needs assertion and re-assertion of CS or WP for each transfer, then it takes longe time if you do all in single transfer mode. Because you have to use a GPIO set/clr to do CS and WP wich takes ~1micro second to set or clr.

             


           

             

          Regards

             

          lumpi