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The DFB runs off the same system clock as the processor, and works just as you surmise. When a new sample is available in one of the input registers, it gets 'crunched' by whatever algorithm is loaded into the DFB's control store, and the result deposited in an output register. The DFB then typically enters an idle state waiting for the next sample.
Out of interest, what are you thinking that you might deploy the DFB to do in a PSoC3-based system?
Thanks for the input kvcp! Planning on doing some secondary filtering of a sampled
system. Also seems handy to use this to filter a vector of data collected in non-realtime
application, since one would know the original sample rate.