0 Replies Latest reply on Jun 22, 2011 3:22 AM by content.librarian

    Drive Strength Change Effect on Jitter and EMI in Programmable Clocks.

    content.librarian

      Drive Strength settings changes affects the edge rate. It is used to reduce the EMI. Changing the bits as mentioned in the respective datasheets, the DC level is shifted percent wise of the nominal as per the bit settings mentioned. However, reducing the drive strength to reduce EMI, in turn can increase the jitter due to the slower edge rates.     

       

         

      Conversely, increasing drive strength gives faster edge rates, more EMI and less Jitter.     

       

         

      This applies to programmable clock whose drive strength can be configured in Advanced mode of CyClocksRT software, that in turn change the bit settings mentioned in the datasheets, like CY22050, CY22150, CY22381, CY22392, CY22393/4/5 and CY22801.