7 Replies Latest reply on Sep 10, 2011 1:18 PM by tomoc_264086

    EMIF on PSoC5, more info required



      I want to interface a tft screen to PSoC5 device using EMIF, however there is very little information about it.


      I want to write to Cortex-M3 memory mapped to EMIF, but don't know about the assignment of data, address and control signals to the pins.


      Can someone point me into the right sources, links, manuals ?



        • 1. Re: EMIF on PSoC5, more info required

          I am having a related problem. I am trying to use a SRAM with EMIF.


          The only thing I found so far ist this document: http://www.cypress.com/?docID=18266


          On page 121 you find something about EMIF, more than in the PSoC 5 datasheet.


          But it doesn't help me to get EMIF run. Maybe it is possible by setting all those mentioned registers.


          Did you find out more about EMIF?

          • 2. Re: EMIF on PSoC5, more info required

            Hi Fabian,


             I am waiting for months now for samples of PSoC5 devices, so my project is on hold. The document, you mentioned is probably the only one explaining something about EMIF. My idea was to interface the screen (tft) using EMIF and DMA, like I did on STM32 micro and it works fast and reliable.


            The PSoC5 implementation of EMIF is unfortunately not the best, as if you assigned one port line as an address, the whole port is unusable, you are not able to use the remaining port lines for anything else.


            As well as you can see the support here is almost none.


            Good luck with your project and please share with us your progress.





            • 3. Re: EMIF on PSoC5, more info required

              OK, I talked with a cypress developer and he wrote me this:


              [quote]Hello Fabian,

              The EMIF was suppose to be a part of PSoC Creator 1.0 Beta5 revision. I need to check if this got slipped.
              Will keep you posted by tomorrow.

              Software: PSoC Creator v1.0 Beta 5
              Link: http://www.cypress.com/?id=2494



              [/quote]Hello Fabian,

              Sorry for the delay. The EMIF was not scheduled for Beta 5.
              It is scheduled only for FCS which is Q1 2011.

              Snehal Acharekar
              Cypress Applications Suppor[/quote]


              Now I asked him if the EMIF is already supported by the hardware but I don't thing so, according to this PDF (page 7): http://www.cypress.com/?docID=22951




              ■ PROBLEM DEFINITION


              The following features are not available. They are disabled by default.
              Keep in their disabled state.
              -- External Memory Interface (EMIF)




              ■ TRIGGER CONDITION(S)
              ■ SCOPE OF IMPACT
              ■ WORKAROUND
              ■ FIX STATUS
              Silicon revision fix available in ES2




              is the current hardware already ES2?

              • 4. Re: EMIF on PSoC5, more info required

                What is the current status of EMIF on PSoC5?  I want use EMIF, however I failed to chose exacly which device and find  out how to use EMIF. Could somebody tell about this issue?



                • 5. Re: EMIF on PSoC5, more info required





                  EMIF support in PSoC Creator will be available from 1.1 version of creator which is scheduled for early Q3 release.







                  • 6. Re: EMIF on PSoC5, more info required



                    Does anyone knows if the EMIF interface will be available only for PSoc 3 or for both Psoc 3 and Psoc 5 ?


                    There are a Psoc creator 1.1 beta version available ?

                    • 7. Re: EMIF on PSoC5, more info required

                      EMIF on PSoC5 is not currently supported.


                      I think that new errata should be released shortly that includes that new errata.


                      You can however design a rudimentary EMIF using the UDB (Universal Digital Blocks)


                      to interface with a typical SRAM.




                      Another option would be to use a SPI interface to a SPI based SRAM type part.


                      The Cypress NVSRAM parts are good for this, and interface easily.


                      best regards,


                      Tom Moxon