7 Replies Latest reply on Jan 13, 2012 10:12 AM by user_1377889

    Limitations in some modules?

    stefanos.nasiopoulos

      Hello everyone,

      I'm a pretty new owner of a PSoC Development Kit and my programming skills are, on a scale from 1(total noob) to 10(kick@ss programmer for NASA), around 3.
      So please respond accordingly    

      I need to know if there are any limitations in the number of ADC, DFB and OpAmp modules used in a project. I mean can I monitor, filter and amplify 6 analog sources at the same time or is there any limitation?

      Thank you

      PS. I hope my question doesn't sound stupid    

        • 1. Re: Limitations in some modules?
          jfmd

          Sangr,

          In short, yes there are limitations in the number of those modules you can use in your design--they're dependent on the specific PSoC part you're building your application for. For example, if you're using the CY8C3866AXI-040 device as your target device, then you will have available to you 1-ADC (DelSig up to 20-bits), 1-DFB, and 4-OpAmps (as well as many other components). If you're targeting a CY8C36, CY8C34 or a CY8C32 (if you have Beta 4 of Creator installed, it was just released) then you will have less analog features available.

          That all said, despite these limitations you can simply place a MUX in front of the device you want to reuse and control the switching of the MUX in software. So, if you have 6 analog sources you want to run through the ADC, simply drag and drop the Analog MUX in front of the ADC in your schematic and configure the MUX such that there's 6 channels available (double-click on the MUX to open its configuration dialog). Then you can use the MUX software API calls (view the MUX datasheet for details) to switch between channels and collect your ADC samples each step of the way.

          Hopefully this helps in answering your question and if not, just ask again and I'll give it another shot     .

          Thanks!
          Jim

          • 2. Re: Limitations in some modules?
            stefanos.nasiopoulos

            Thank you for the reply. It was pretty clear    

            I'll be using the CY8C3866AXI-040 for this project. The thing is that I have 6 sensors that need to be amplified and filtered and I would prefer if I could do that within PSoC so I don't need any external hardware. But each one of them need different amount of amplification and different cutoff frequency.

            Do you believe it will be efficient to do this in PSoC and change the filter and OpAmp settings through the software every time I switch the channel in the MUX? Or should I just build and amplifier and a filter for each sensor and then connect it to PSoC?

            Edit: I am using PSoC Creator 1.0 Beta 4.0 (1.0.0.5810)

            • 3. Re: Limitations in some modules?
              content.librarian
                      Sangr,   
                 
              Do you know what type of resolution and sampling rate you are looking to achieve? I don't think using the 6 sensors and having the PSoC treat each one differently is a problem, but sampling speed could be an issue since the ADC is a Del-Sig, so you have to divide your SPS by 4 when you are adding additional channels.   
                 
              -Bobby   
              • 4. Re: Limitations in some modules?
                user_2649414
                        I can not speak about psoc3, but I tried to switch the ins amp gain on a PSOC1 device @ ~2000 samples per second and the settling time of the ins amp was too long. I would think that switching the amp gain during runtime on PSOC3 would also be problematic.   
                   
                Might be a better to switch the resolution of the ADC dynamically, or better yet just run at a very high resolution sample rate and do the filtering in firmware or with a digital block. You can also sample at a conservative resolution and do decimation to get a few more bits of resolution.   
                   
                Lots of ways to skin this cat.   
                • 5. Re: Limitations in some modules?
                  stefanos.nasiopoulos

                  Hey I'm back with more questions.    

                  First of all let me thank all 3 of you for your answers.
                  The highest sampling rate I need is 1KHz @ 10bits. So I think the ADC should be more than able to handle this. I have another problem now. I don't know how to change the filter's cutoff frequency through the API. I can't find any API routine in the data sheet (or sometimes I'm blind).

                  Is it possible to be done or you can only set the filter in the TopDesign and use it as it is?

                  • 6. Re: Limitations in some modules?
                    content.librarian
                            The same question was asked and answered on the PSoC Developer's forum. For those who might not monitor both, I thought I would post the answer again here. This was answered on PSoC Developer by 'NLaksh' (    http://www.psocdeveloper.com/f...opic.php?f=42&t=6305)    
                       
                    ------------------------   
                       
                    Sangr,   
                       
                    Yes, it is correct that the setting of cut off frequency can be done onlt throught the GUI. The reason is the cut off frequency is one of the basic deciding factor for the filter coefficients. If you change the cut off frequency, then you should also change the filter coefficients accordingly. So if you think you need to change the cut off frequency or other parameters in run time, all you can do is change the filter coefficients directly. You can have a specified set of filter coefficients and update them to the RAM registers whenever required. You can use DMA to write the coefficients so that the process is fast.   
                    And, the maximum number of PGA's possible is only 4. The PGA's are built around the configurable analog block (SC/CT blocks), which are only 4 in the device. This limits the number of PGAs to 4.   
                       
                    Regards,   
                    Lakshmi   
                       
                    ------------------------   
                       
                    -Bobby   
                    • 7. Re: Limitations in some modules?
                      user_1377889

                      As there is a count restriction on ADCs it will not matter much that the number of PGAs is restricted as well.

                         

                      I would sugest a structure alike:

                         

                       

                         

                      Input pins (read carefully about Analog pin routing!!!)

                         

                      Analog MUX 

                         

                      PGA

                         

                      ADC

                         

                      Filter (remember that you have two filter channels).

                         

                      Although you committed a relatively low skill in programming I would suggest that you

                         

                      Build an array[number of inputs] of a structure describing

                         

                      all the needed parameters for MUX, PGA, ADC,Filter. When you switch the imputs you just have to write the parameters to the appropiate APIs. When your required sampling frequency is relatively low ( I estimate < 1000Hz) then this aproach will work.

                         

                      There is a chance to transfer the data from ADC to filter or from Filter to memory via DMA, but since you have 6 signals that could be a messy job.

                         

                      Are you measuring each signal for a short time span and then switch nto the next sensor or do you have to measure each signal once, then the next , then the next etc. continously?

                         

                      Happy switching

                         

                      Bob