Generally the VDD pin draws more current. The AVDD pin powers the core and the PLL's, while the VDD pin powers the clock outputs. It is frequency and configuration dependant for the CY22392F. When you use CyClocksRT of CyberClocks Suite, there is a Current Consumption display in the Advanced GUI section which shows the total amount of current the device will typically need. By clicking on each of output suspend box you can see how much current that particular output consumes by subtracting the total current consumption before and after selecting the suspend option.
If all PLL's are running around 400MHz the AVDD will draw around 20mA, if all PLL's are running around 200MHz the AVDD will draw around 12mA and if all PLL's are running around 100MHz the AVDD will draw around 8mA.
You can subtract the AVDD value from the total current consumption to get the VDD current.