The filter component in PSoC3/5 is digital in nature, thus requiring an ADC first. To remove the burden for the CPU to transfer the converted values from ADC to Filter a DMA is appropiare thus freeing a lot of MIPS.
Nevertheless there are two LPFs within a PSoC3/5 which you may use, have a look at this thread http://www.cypress.com/?app=forum&id=2233&rID=63395
DMA is just one option for the filter data handling -
The customizer for the Filter component allows you to configure digital filters on
one or two data streams passed to the Digital Filter Block(DFB),using DMA,interrupts,
or polling to manage data flow. TheDFB’s 128 data and coefficientlocations are shared
as needed between the two filter channels.The customizer reports (but does not set)
the minimum bus clock frequency required to execute the filtering within the user-
declared sample interval.
The filter can perform BP, LP, HP, Band Stop.......
Hi Bob and Dana,
I have read the example project of Filter. In that project, the cutoff frequency is 1KHz and input voltage range of ADC is 0 to 1.024V. My input sine wave is 900Hz and Vpp = 1V. So I expect to get sine wave on output terminal of VDAC which is equal in amplitude and frequency to the sine wave on input terminal of ADC. But my wave observed is not like the expection. Have I made any mistakes?
I attached my project.
I tried several times but failed to upload my files. My project is just the example project found in PSoC Creator.
Have you zip the file?
Yes, I zipped the file.
To upload a project here in Creator
Build -> Clean Project
File -> Create Workspace Bundle (minimal)
and then upload the resulting archieve here.
You do not get the signal you expect? A probabil might be that your 1V p-p signal might go below 0V. Check that with an oscilloscope.
When uploading does not work, try to use MS Internet Explorer, I've seen some issues with other browsers.
If you sine wave is ground referenced you are violating common mode input range
of A/D or amplifier. In other words you need to level shift the sine wave to meet
the input CM range.
For example, if A/D Vref is Vssa to 2.048, single ended, optimally sine would go
from 0 Vdc to 2.048, that is its amplitude would be 2.048 and it would have a DC
offset of 1.024.
An easy way to offset input signals -
Attached is Excel calculator for the R's.
121237.xls 12.0 K