4 Replies Latest reply on Oct 19, 2012 2:08 AM by content.librarian

    Advantages of Programmable PLL based device over pin programmable PLL based devices

    content.librarian

      In a ‘customized’ PLL, the Q, P, and the Post-Divider are mask-programmed in a ROM. They have Fixed values and fixed frequencies.

         

      The Drawbacks of non-programmable PLL based devices are:

         

      1.       Design (i.e. frequency) changes can be costly and time-consuming.

         

      2.       Long lead times for new custom solutions.

         

      3.       Searching for a new fixed-function part.

         

      With Cypress programmable clock chips, the Q, P, and the Post-Divider are programmable in EPROM or EEPROM. Design changes are fast, easy and flexible. Programming a new set of P, Q, and Post-Divider values allows for design changes throughout project development.

         

      To summarize, Cypress has Programmable synthesizers, EMI Reducing clock generators, VCXO based devices and programmable crystal oscillators that have following key advantages:

         

                Programmable technology allows fast prototype builds

         

                Generates a wide range of frequencies using low cost crystals (Xtals)

         

                Multi-PLL devices integrates multiple Xtals/ XOs reducing cost

         

                VCXO option for tuning frequency

         

                Spread Spectrum option for reducing EMI at its source

         

                Low Jitter for maximizing system reliability

         

                Specialty Clocks for applications in Handsets, PCI, XDR Rambus

         

                Low Power for portable applications