2 Replies Latest reply on Jun 30, 2017 3:06 PM by content.librarian

    Writing Datapath Register & Filling FIFO via DMA

    content.librarian

      Hello All,

         

      I'm trying to transfer a few values between an array and a datapath register and FIFO.  However, I don't have a good grasp on the ins and outs of DMA.  I think I've figured it out, but I was wondering if anyone could give my work a glance.

         

      I have the following:

         
            
      1. A 16-bit datapath whose instance name is DelHist_SM_DP
      2.     
      3. An array defined as uint16 DelHist_I_target [5]
      4.     
      5. A DMA whose instance name is DelHist_Target_DMA
      6.    
         

      When the drq line on the DMA is pulsed, I want the following to occur:

         
            
      1. Transfer first value (2 bytes) in the array to the datapath data register D0.
      2.     
      3. Fill the datapath FIFO F0 with the remaining 4 values (8 bytes total) of the array.
      4.    
         

      Since I don't understand the DMA very well, I relied on the DMA wizard to set it up.  I have attached a screenshot of my entry.  The output of the wizard (with one modification) is below.  Note that, because the wizard didn't recognize the datapath, I had to tell it that I was doing an SRAM to SRAM transfer, then manually modify the destination base.

         

      Am I on the right track?

         

      Paul

         

       

         

      /* Defines for DelHist_Target_DMA */
      #define DelHist_Target_DMA_BYTES_PER_BURST 127
      #define DelHist_Target_DMA_REQUEST_PER_BURST 0
      #define DelHist_Target_DMA_SRC_BASE (CYDEV_SRAM_BASE)
      // #define DelHist_Target_DMA_DST_BASE (CYDEV_SRAM_BASE)
      #define DelHist_Target_DMA_DST_BASE (CYDEV_PERIPH_BASE)        // Modified base address

         


      /* Variable declarations for DelHist_Target_DMA */
      /* Move these variable declarations to the top of the function */
      uint8 DelHist_Target_DMA_Chan;
      uint8 DelHist_Target_DMA_TD[2];

         

      /* DMA Configuration for DelHist_Target_DMA */
      DelHist_Target_DMA_Chan = DelHist_Target_DMA_DmaInitialize(DelHist_Target_DMA_BYTES_PER_BURST, DelHist_Target_DMA_REQUEST_PER_BURST,
          HI16(DelHist_Target_DMA_SRC_BASE), HI16(DelHist_Target_DMA_DST_BASE));
      DelHist_Target_DMA_TD[0] = CyDmaTdAllocate();
      DelHist_Target_DMA_TD[1] = CyDmaTdAllocate();
      CyDmaTdSetConfiguration(DelHist_Target_DMA_TD[0], 2, DelHist_Target_DMA_TD[1], TD_AUTO_EXEC_NEXT);
      CyDmaTdSetConfiguration(DelHist_Target_DMA_TD[1], 8, CY_DMA_DISABLE_TD, DelHist_Target_DMA__TD_TERMOUT_EN);
      CyDmaTdSetAddress(DelHist_Target_DMA_TD[0], LO16((uint32)DelHist_I_target), LO16((uint32)DelHist_SM_DP_D0_PTR));
      CyDmaTdSetAddress(DelHist_Target_DMA_TD[1], LO16((uint32)&DelHist_I_target[1]), LO16((uint32)DelHist_SM_DP_F0_PTR));
      CyDmaChSetInitialTd(DelHist_Target_DMA_Chan, DelHist_Target_DMA_TD[0]);
      CyDmaChEnable(DelHist_Target_DMA_Chan, 1);