1 Reply Latest reply on Jul 24, 2017 4:04 AM by KandlaguntaR_36

    [AN65974] Slave FIFO stuck with FLAGA high and FLAGB low


      I did modify the example given in slaveFIFO2b_streamIN.v (attached) to be able to send the stream of bytes packed into 32 bit words (using  Xilinx FIFO core). Quite naturally the SLWR now doesn't stay low all the time, but goes high when FIFO output is not valid. 


      Unfortunately after this modification once FLAGB goes low it stays low forever. 


      To reproduce it I did modify the test bench fpga_master_tb.v (attached) to simulate the FX3 behavior to the best of my understanding. 


      From what I see if FLAGB goes low, but I don't write enough words to fill entire DMA buffer, the DMA will not get flushed.


      Do I understand correctly that I have only two options:

      • Make sure that I always write exact number of words as a buffer size
      • Drive PKTEND low once the FLAGB is low to flush the DMA.

      Otherwise FLAGB will stay low forever.