3 Replies Latest reply on Aug 20, 2017 7:56 PM by jikic_2618406

    How 'Loopback transfer' works



      I am trying to learn USB communication, and I am using cypress fx3.


      I uploaded 'SF_loopback' firmware image in fx3 board,
      When executing Bulk OUT, I clicked 'Transfer Data-IN' without inputting data.
      Also, when I run Bulk IN, the result is as shown in the attached figure.


      The result of the second Bulk IN is different from the first Bulk IN. I wonder why.




      Thank you:)

        • 1. Re: How 'Loopback transfer' works

          Bulk_in_1 can be because of data lying in the DMA buffer which wasn't read from FX3. Do you get this all the time, or did you see it once or under certain circumstance?


          I see in the bulk_out, you are transmitting 000.. to the FX3 and while reading you see 2 bytes of FF alternatively. Did you made sure that the GPIF and FPGA are connected with all the 32 bit interface? If you have only 16 bit interface, then while sampling the FX3 will consider the unconnected pins as default high logic. So, make sure that you have all the 32 bit data lines connected properly.


          If you want to have only 16 bit interface, then change this in the IO matrix and the GPIF project and build the project again with #define LOOPBACK_SHRT_ZLP. Then the GPIF will be configured for 16 bit data

          • 2. Re: How 'Loopback transfer' works

            I have not considered 16-bit and 32-bit interfaces properly.

            I will now modify the IO and GPIF again.


            Thank you for your kind answers !

            • 3. Re: How 'Loopback transfer' works

              One more question,,..


              I refer to 'FX_PROGRAMMERS_MANUAL.pdf' and defined as follows.


              I set up 16bit GPIF data bus.

              #define CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT (0)


              and Set up DMA channel

              #ifdef LOOPBACK_SHRT_ZLP

              #define BURST_LEN 1

              #define DMA_BUF_SIZE  (1)

              #define CY_FX_SLFIFO_DMA_BUF_COUNT_P_2_U   (2)    /* Slave FIFO P_2_U channel buffer count - Used with AUTO DMA channel */

              #define CY_FX_SLFIFO_DMA_BUF_COUNT_U_2_P  (2)   /* Slave FIFO U_2_P channel buffer count - Used with AUTO DMA channel */



              An error has occurred as shown in the following figure.


              What's the problem?