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I am surprised that nearly one month after my initial post no one from Cypress bothered to answer this simple question or post a link to a document where this will be answered. A quick chat with a chip designer will have been enough to obtain this information but it might be the case that Cypress is such a big company that marketing and/or application engineers don't even know who are the chip designers.
FEC is not implemented in CyFi. It has the CRC check . When the bytes are transmitted from transmitter to receiver . The receiver checks for the CRC and ensures the reliable communication.
Thanks Sai Prashanth for the useful reply. That confirms my suspicion stated above. Anyway the upper protocol layers will be able to request a retransmission based on the CRC check.
One can view a FEC scheme as a way to improve the receiver sensitivity by several dBs, but it costs gate area and power consumption. Usually FEC is cheaper than achieving it (better Rx sens.) by other means, probably not in this case.