11 Replies Latest reply on Aug 17, 2011 12:35 AM by udayanu_

    ADC PSoc 3 Noise?

            I tried using the the 16 bit ADC from the Cypress website. This was written for the PSoc 3. The LCD showed 1.101XX. I tried converting to a 20 bit ADC and got
      1.1012xx. Is this normal? I tried 10.000 voltage references from Maxim, Batteries and other sources. Is there an application that will get a better resolution? I am looking to eliminate the xx. I am not sure if this is noise or just something in the AD conversion.

      Regards

      Philip

      PS: This is the best kit that I have purchased.

        • 1. Re: ADC PSoc 3 Noise?
          MR_41

          Hi Philip,

          The fluctuation in the last two digits could be because of system noise. You can easily get rid of this by passing the ADC result through a a Low pass filter. Check out the below example project that shows how to stream 16 bit data through a DMA to a Filter. You will have to do some modifications to the project to pass the 20 bit result to the Filter.

          http://www.cypress.com/?rID=39971

          • 2. Re: ADC PSoc 3 Noise?
                    Thank you very much for sending the link. I may be able to use a 16 bit if the Filter works.   
               
            Thank You,   
               
            Philip   
            • 4. Re: ADC PSoc 3 Noise?

              Hi Phillip,

                 

               

                 

              Did you find that adding the filter helped to eliminate your system noise? my problem is , if I add the filter to the ADC it reduces the code value from its full scale range of 0-65535 to something like 0 -15 k. Currently im using a cutoff frequency of 100 Hz, as higher frequencies dont seem to reduce the code spread in the last two digits so well.

                 

              If you managed to get your setup working well, could you help me out?

                 

               

                 

              Thanks!

              • 5. Re: ADC PSoc 3 Noise?

                Essentially, the data sheet is claiming to have a +/- 2 LSB INL for  the 16 bit Delg Sig ADC. Im having alot of difficulty achieving this percision and need to find a configuration which can achieve this successfully

                   

                (Im using the CY8CKIT-001 with PSOC 5)

                • 6. Re: ADC PSoc 3 Noise?

                  Unfortunately, the CY8CKIT-001 is not designed for high precision, low noise analog performance. The CY8CKIT-030 (PSoC3) and CY8CKIT-050 (PSoC5) are specifically designed for this goal.

                     

                  Kris

                  • 7. Re: ADC PSoc 3 Noise?

                    The 001 kit is not designed to provide precision analog performance. The noise floor on this board is a bit higher compared to the CY8CKIT-030. The CY8CKIT-030 and CY8CKIT-050 are designed to provide good analog performance. Please read through this thread to know more about these boards, http://www.cypress.com/?app=forum&id=2232&rID=50255 .

                    • 8. Re: ADC PSoc 3 Noise?

                      I used averaging the results in software. Take three samples, add their values and divide the result by three. Made a huge difference for stability on psoc 4 BLE ADC

                      • 9. Re: ADC PSoc 3 Noise?
                        JoMe_264151

                        Welcome in the forum!

                           

                        A bit old this thread from 2011.  ;-)

                           

                        Just a tip: You can do averaging in hardware by specifying to av 2, 4, 8... samples

                           

                         

                           

                        Bob

                        • 10. Re: ADC PSoc 3 Noise?

                          Hello Bob,

                             

                          Thank you,

                             

                          Yes, I found the ADC setting in which it can be forced to average as much as 256 samples before issuing a result value. However, even these averaged values seem to have some 'flicker' in the last one or two digits. As the results are received fast enough on the client side, it is ok for me to do some more averaging on the client side as well in the software. This improves the stability of the reading. Even by averaging as little as 3 - 10 readings.

                             

                          I tried to do this same trick on the server (peripheral) side, but seem to have some trouble (lack of basic knowledge...) in summarizing and dividing hex values. I'm not sure if an int16 can hold the sum of 256 int16 hex values.

                          • 11. Re: ADC PSoc 3 Noise?
                            JoMe_264151

                            I'm not sure if an int16 can hold the sum of 256 int16 hex values. No, it cannot even hold two added values for sure, but of course you may use as intermediate result an int32 Sum before you divide.

                               

                             

                               

                            Bob