Anonymous
Not applicable
Nov 19, 2009
01:24 PM
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Nov 19, 2009
01:24 PM
I have a CY7C68053 interfaced to an FPGA, which can feed image data from a frame buffer.
Originally intended to do a custom protocol, with simple endpoint0 control and another endpoint for data from FPGA to host (CE single-board computer).
I am now exploring the possibility of going all the way to comply with USB Still Image Class.
Does Cypress have a reference design for it? Has anyone implemented it on a FX2? Consultants welcome.
Labels
0 Replies