0 Replies Latest reply on Apr 9, 2010 5:11 PM by lee.carter

    CY7C68013A USB Slave FIFO IN transfer fail

    lee.carter
              Hi All.   
         
      I have transfer problem in Slave fifo with my FPGA.   
         
      This following thing is my verilog code.   
      My intention is always data out from in my FPGA. (For test)   
         
         
      `timescale 1ns/10ps   
      module usb(   
         
      input clk48m,   
      input i_Rstb,   
         
      ///////////////////////////////   
         
      output o_ifclk, ////   
      output [1:0] o_fifoadr, ////   
      input i_flagc, ////   
      input i_flagb, ////   
      output o_sloe, ////   
      //output o_slrd, ////   
      output [15:0] o_fd, ////   
         
      output o_slcs,   
      output o_slwr,   
      output o_pktend   
         
      );   
         
      wire [1:0] o_fifoadr;   
      reg o_sloe;   
      //reg o_slrd;   
         
      wire clk48m;   
         
      assign o_ifclk = clk48m;   
      assign o_fifoadr= 2'b11;   
      assign o_slcs = 1'b0;   
         
      assign o_pktend = 1'b1;   
      //assign o_slwr = 1'b1;   
      //assign o_slrd = w_slrd;   
         
      reg [8:0] fd;   
      reg o_slwr;   
      reg [15:0] o_fd;   
         
      wire w_Rst = ~i_Rstb; ////////////////   
         
         
      always @(negedge i_Rstb or posedge clk48m)   
      begin   
      if(!i_Rstb)begin   
      o_sloe <= 1;   
      o_slwr <= 0;   
      fd <= 0;   
      o_fd <= 0;   
      end   
      else begin   
      o_sloe <= 1;   
      o_slwr <= 0;   
      fd <= fd + 1;   
      o_fd <= fd;   
      end   
      end   
      ============================================   
      Is this any have wrong operation problems in AUTO IN?   
         
         
      And, i use this firmware /USB/Examples/FX2LP/bulkloop/bulkloop.c   
         
      //-----------------------------------------------------------------------------   
      // File: bulkloop.c   
      // Contents: Hooks required to implement USB peripheral function.   
      //   
      // $Archive: /USB/Examples/FX2LP/bulkloop/bulkloop.c $   
      // $Date: 3/23/05 2:55p $   
      // $Revision: 4 $   
      //   
      //   
      //-----------------------------------------------------------------------------   
      // Copyright 2003, Cypress Semiconductor Corporation   
      //-----------------------------------------------------------------------------   
      #pragma NOIV // Do not generate interrupt vectors   
         
      #include "fx2.h"   
      #include "fx2regs.h"   
      #include "syncdly.h" // SYNCDELAY macro   
         
      extern BOOL GotSUD; // Received setup data flag   
      extern BOOL Sleep;   
      extern BOOL Rwuen;   
      extern BOOL Selfpwr;   
         
      BYTE Configuration; // Current configuration   
      BYTE AlternateSetting; // Alternate settings   
         
      #define VR_NAKALL_ON 0xD0   
      #define VR_NAKALL_OFF 0xD1   
         
      //-----------------------------------------------------------------------------   
      // Task Dispatcher hooks   
      // The following hooks are called by the task dispatcher.   
      //-----------------------------------------------------------------------------   
         
      void TD_Init(void) // Called once at startup   
      {   
      /*   
      CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1); SYNCDELAY; // set the CPU clock to 48MHz   
      SYNCDELAY;   
         
      IFCONFIG = 0x03; // use IFCLK pin driven by external logic (5MHz to 48MHz)   
      // use slave FIFO interface pins driven sync by external master   
      SYNCDELAY;   
      REVCTL = 0x03; // REVCTL.0 and REVCTL.1 to set to 1   
      SYNCDELAY;   
      EP2CFG = 0xA2; // EP2 is DIR=OUT, TYPE=BULK, SIZE=512, BUF=2x   
      SYNCDELAY;   
      FIFORESET = 0x80; // Reset the FIFO   
      SYNCDELAY;   
      FIFORESET = 0x82;   
      SYNCDELAY;   
      FIFORESET = 0x00;   
      SYNCDELAY;   
      OUTPKTEND = 0x82; // Arm both EP2 buffers to "prime the pump"   
      SYNCDELAY;   
      OUTPKTEND = 0x82;   
      SYNCDELAY;   
      EP2FIFOCFG = 0x10; // EP2 is AUTOOUT=1, AUTOIN=0, ZEROLEN=0, WORDWIDE=0   
      */   
         
      IFCONFIG = 0x03; // use IFCLK pin driven by external logic (5MHz to 48MHz)   
      // use slave FIFO interface pins driven sync by external master   
      SYNCDELAY;   
      REVCTL = 0x03; // REVCTL.0 and REVCTL.1 set to 1   
      SYNCDELAY;   
      EP8CFG = 0xE0; // sets EP8 valid for IN's   
      // and defines the endpoint for 512 byte packets, 2x buffered   
      SYNCDELAY;   
      FIFORESET = 0x80; // reset all FIFOs   
      SYNCDELAY;   
      FIFORESET = 0x02;   
      SYNCDELAY;   
      FIFORESET = 0x04;   
      SYNCDELAY;   
      FIFORESET = 0x06;   
      SYNCDELAY;   
      FIFORESET = 0x08;   
      SYNCDELAY;   
      FIFORESET = 0x00;   
      SYNCDELAY; // this defines the external interface to be the following:   
      EP8FIFOCFG = 0x0C; // this lets the EZ-USB auto commit IN packets, gives the   
      // ability to send zero length packets,   
      // and sets the slave FIFO data interface to 8-bits   
      PINFLAGSAB = 0x00; // defines FLAGA as prog-level flag, pointed to by FIFOADR[1:0]   
      SYNCDELAY; // FLAGB as full flag, as pointed to by FIFOADR[1:0]   
      PINFLAGSCD = 0x00; // FLAGC as empty flag, as pointed to by FIFOADR[1:0]   
      // won't generally need FLAGD   
      PORTACFG = 0x00; // used PA7/FLAGD as a port pin, not as a FIFO flag   
      SYNCDELAY;   
      FIFOPINPOLAR = 0x00; // set all slave FIFO interface pins as active low   
      SYNCDELAY;   
      EP8AUTOINLENH = 0x02; // EZ-USB automatically commits data in 512-byte chunks   
      SYNCDELAY;   
      EP8AUTOINLENL = 0x00;   
      SYNCDELAY;   
      EP8FIFOPFH = 0x80; // you can define the programmable flag (FLAGA)   
      SYNCDELAY; // to be active at the level you wish   
      EP8FIFOPFL = 0x00;   
         
         
      }   
         
         
      void TD_Poll(void) // Called repeatedly while the device is idle   
      {   
         
      }   
         
      BOOL TD_Suspend(void) // Called before the device goes into suspend mode   
      {   
      return(TRUE);   
      }   
         
      BOOL TD_Resume(void) // Called after the device resumes   
      {   
      return(TRUE);   
      }   
         
      //-----------------------------------------------------------------------------   
      // Device Request hooks   
      // The following hooks are called by the end point 0 device request parser.   
      //-----------------------------------------------------------------------------   
         
      BOOL DR_GetDescriptor(void)   
      {   
      return(TRUE);   
      }   
         
      BOOL DR_SetConfiguration(void) // Called when a Set Configuration command is received   
      {   
      Configuration = SETUPDAT[2];   
      return(TRUE); // Handled by user code   
      }   
         
      BOOL DR_GetConfiguration(void) // Called when a Get Configuration command is received   
      {   
      EP0BUF[0] = Configuration;   
      EP0BCH = 0;   
      EP0BCL = 1;   
      return(TRUE); // Handled by user code   
      }   
         
      BOOL DR_SetInterface(void) // Called when a Set Interface command is received   
      {   
      AlternateSetting = SETUPDAT[2];   
      return(TRUE); // Handled by user code   
      }   
         
      BOOL DR_GetInterface(void) // Called when a Set Interface command is received   
      {   
      EP0BUF[0] = AlternateSetting;   
      EP0BCH = 0;   
      EP0BCL = 1;   
      return(TRUE); // Handled by user code   
      }   
         
      BOOL DR_GetStatus(void)   
      {   
      return(TRUE);   
      }   
         
      BOOL DR_ClearFeature(void)   
      {   
      return(TRUE);   
      }   
         
      BOOL DR_SetFeature(void)   
      {   
      return(TRUE);   
      }   
         
      BOOL DR_VendorCmnd(void)   
      {   
      /*   
      BYTE tmp;   
         
      switch (SETUPDAT[1])   
      {   
      case VR_NAKALL_ON:   
      tmp = FIFORESET;   
      tmp |= bmNAKALL;   
      SYNCDELAY;   
      FIFORESET = tmp;   
      break;   
      case VR_NAKALL_OFF:   
      tmp = FIFORESET;   
      tmp &= ~bmNAKALL;   
      SYNCDELAY;   
      FIFORESET = tmp;   
      break;   
      default:   
      return(TRUE);   
      }   
      */   
      return(FALSE);   
      }   
         
      //-----------------------------------------------------------------------------   
      // USB Interrupt Handlers   
      // The following functions are called by the USB interrupt jump table.   
      //-----------------------------------------------------------------------------   
         
      // Setup Data Available Interrupt Handler   
      void ISR_Sudav(void) interrupt 0   
      {   
      GotSUD = TRUE; // Set flag   
      EZUSB_IRQ_CLEAR();   
      USBIRQ = bmSUDAV; // Clear SUDAV IRQ   
      }   
         
      // Setup Token Interrupt Handler   
      void ISR_Sutok(void) interrupt 0   
      {   
      EZUSB_IRQ_CLEAR();   
      USBIRQ = bmSUTOK; // Clear SUTOK IRQ   
      }   
         
      void ISR_Sof(void) interrupt 0   
      {   
      EZUSB_IRQ_CLEAR();   
      USBIRQ = bmSOF; // Clear SOF IRQ   
      }   
         
      void ISR_Ures(void) interrupt 0   
      {   
      // whenever we get a USB reset, we should revert to full speed mode   
      pConfigDscr = pFullSpeedConfigDscr;   
      ((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;   
      pOtherConfigDscr = pHighSpeedConfigDscr;   
      ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;   
         
      EZUSB_IRQ_CLEAR();   
      USBIRQ = bmURES; // Clear URES IRQ   
      }   
         
      void ISR_Susp(void) interrupt 0   
      {   
      Sleep = TRUE;   
      EZUSB_IRQ_CLEAR();   
      USBIRQ = bmSUSP;   
      }   
         
      void ISR_Highspeed(void) interrupt 0   
      {   
      if (EZUSB_HIGHSPEED())   
      {   
      pConfigDscr = pHighSpeedConfigDscr;   
      ((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;   
      pOtherConfigDscr = pFullSpeedConfigDscr;   
      ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;   
      }   
         
      EZUSB_IRQ_CLEAR();   
      USBIRQ = bmHSGRANT;   
      }   
      void ISR_Ep0ack(void) interrupt 0   
      {   
      }   
      void ISR_Stub(void) interrupt 0   
      {   
      }   
      void ISR_Ep0in(void) interrupt 0   
      {   
      }   
      void ISR_Ep0out(void) interrupt 0   
      {   
      }   
      void ISR_Ep1in(void) interrupt 0   
      {   
      }   
      void ISR_Ep1out(void) interrupt 0   
      {   
      }   
      void ISR_Ep2inout(void) interrupt 0   
      {   
      }   
      void ISR_Ep4inout(void) interrupt 0   
      {   
      }   
      void ISR_Ep6inout(void) interrupt 0   
      {   
      }   
      void ISR_Ep8inout(void) interrupt 0   
      {   
      }   
      void ISR_Ibn(void) interrupt 0   
      {   
      }   
      void ISR_Ep0pingnak(void) interrupt 0   
      {   
      }   
      void ISR_Ep1pingnak(void) interrupt 0   
      {   
      }   
      void ISR_Ep2pingnak(void) interrupt 0   
      {   
      }   
      void ISR_Ep4pingnak(void) interrupt 0   
      {   
      }   
      void ISR_Ep6pingnak(void) interrupt 0   
      {   
      }   
      void ISR_Ep8pingnak(void) interrupt 0   
      {   
      }   
      void ISR_Errorlimit(void) interrupt 0   
      {   
      }   
      void ISR_Ep2piderror(void) interrupt 0   
      {   
      }   
      void ISR_Ep4piderror(void) interrupt 0   
      {   
      }   
      void ISR_Ep6piderror(void) interrupt 0   
      {   
      }   
      void ISR_Ep8piderror(void) interrupt 0   
      {   
      }   
      void ISR_Ep2pflag(void) interrupt 0   
      {   
      }   
      void ISR_Ep4pflag(void) interrupt 0   
      {   
      }   
      void ISR_Ep6pflag(void) interrupt 0   
      {   
      }   
      void ISR_Ep8pflag(void) interrupt 0   
      {   
      }   
      void ISR_Ep2eflag(void) interrupt 0   
      {   
      }   
      void ISR_Ep4eflag(void) interrupt 0   
      {   
      }   
      void ISR_Ep6eflag(void) interrupt 0   
      {   
      }   
      void ISR_Ep8eflag(void) interrupt 0   
      {   
      }   
      void ISR_Ep2fflag(void) interrupt 0   
      {   
      }   
      void ISR_Ep4fflag(void) interrupt 0   
      {   
      }   
      void ISR_Ep6fflag(void) interrupt 0   
      {   
      }   
      void ISR_Ep8fflag(void) interrupt 0   
      {   
      }   
      void ISR_GpifComplete(void) interrupt 0   
      {   
      }   
      void ISR_GpifWaveform(void) interrupt 0   
      {   
      }   
      ///////////////////////////////////////////////////////////////   
      Also, i have used https://secure.cypress.com/forums/forum/messageview.cfm?catid=8&threadid=3543&highlight_key=y&keyword1=slave%20fifo   
      But, it is not work.   
         
      ===================================   
      Is this have any wrong problems?   
         
         
      And, So i have used it following code.   
      C:\Cypress\USB\Util\CyBulk\BulkLoop.dsw   
         
      CCyUSBDevice *USBDevice = new CCyUSBDevice(NULL);   
      unsigned char buf[512];   
      LONG length = 512;   
      if (USBDevice->BulkInEndPt)   
      USBDevice->BulkInEndPt->XferData(buf, length);   
         
      But this is not work.   
      I cannot receive any data form FPGA.   
         
      what is this exactly wrong?   
      Could you please let me know?   
         
      Please Help me. please.   
         
         
      Thanks