0 Replies Latest reply on Apr 15, 2010 3:50 AM by y.xm

    About 68013 of gpif_fifo_write problems, help me to find the problems,very grateful! !

    y.xm

       Doing a host computer and FPGA communication, through cy7c68013 of GPIF_FIFO read and write to communications, the following initialization of the firmware is 68013, help me find out where the problem, I have engaged in several days, and specific settings are as follows:
      // EP2OUT, bulk, size 512, 4x buffered,autoout,byte
      // EP6IN, bulk, size 512, 4x buffered,autoin,byte

      note:the code belowed acomplishes the "gpif fifo write" part
      Code:

         

      void TD_Init(void)             // Called once at startup
      {
        // set the CPU clock to 48MHz
        CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1);
        GpifInit (); // initialize GPIF registers
        
        SYNCDELAY;
        EP2CFG = 0xA0;     // EP2OUT, bulk, size 512, 4x buffered
        SYNCDELAY;                    
                     
        EP6CFG = 0xE0;     // EP6IN, bulk, size 512, 4x buffered
        SYNCDELAY;                    

        FIFORESET = 0x80;            // activate NAK-ALL to avoid race conditions
        SYNCDELAY;                    //
        FIFORESET = 0x02;            // reset, FIFO 2
        SYNCDELAY;                    //
        FIFORESET = 0x06;            // reset, FIFO 6
        SYNCDELAY;                    //
        FIFORESET = 0x00;            // deactivate NAK-ALL
        SYNCDELAY;                    //


        EP2FIFOCFG = 0x10; // auto out mode, disable PKTEND zero length send, byte ops
        SYNCDELAY;
        EP6FIFOCFG = 0x08; // auto in  mode, disable PKTEND zero length send, byte ops
        SYNCDELAY;   
        // out endpoints do not come up armed
        // since EP2OUT is quad buffered we must write dummy byte counts four times
      EP2BCL = 0x80;     // arm EP2OUT by writing byte count w/skip.
        SYNCDELAY;                    
        EP2BCL = 0x80;
        SYNCDELAY;                    
        EP2BCL = 0x80;
        SYNCDELAY;
        EP2BCL = 0x80;
        SYNCDELAY;  
        
      }
       In TD_Poll () the code below, there is a problem here, doesn't the cpu process in the autoout way?Why the cpu process here? And I don't  understand the following code, and do not know whether the code is correct or not .I found this code in a paper. I hope someone can explain the code,thanks! 

         

      void TD_Poll(void)
      {
      //      完成FIFO的写操作,从EP2-OUT写到外部FIFO中

         

      // finish the fifo writing,from EP2 to external fifo
      /*****************************************************************************/
      if ( ! ( EP2468STAT & bmEP2EMPTY ) )
      {
        SYNCDELAY;
        EP2BCL=0x00;
      //SKIP=0,这里不就是手动在处理数据吗??为什么,autoout是什么意思呢?
        }  

        if(GPIFTRIG & 0x80)
        {
         if(!(EP24FIFOFLGS & 0x20))
         {
           GPIF_SetAddress(ADDRESS_FIFO1);   //设置地址
           GPIFTCB0=EP2FIFOBCL;
           SYNCDELAY;
           GPIFTCB1=EP2FIFOBCH;
           SYNCDELAY;
           GPIF_FIFOWrite(0);     //触发FIFO写波形
         }
        }
      Also: I see the <ez-usb trm > there that should be added in the initialization
      REVCTL=0x03; 
      I do not know why?