Some points to check:
1. What is the column clock setting for the DAC? Depending on the power you operate, there is a maximum column clock limitation. If the column clock is more than the limit, then the DAC output will not be as expected.
2. Is the DAC set to signed or unsigned? If set to unsigned, you will get REFLO at the output, ie, 1.3V. For a value of 62, you should get REFHI which is 3.8V
I'm using a 136KHz frecuency column clock. Much lower than the 3.2MHz let it with high Power
use modele way.
The DAC is signed?
The input data is OffsetBinary. I shoudl to obtain following the formula a values between 2,6V and 3,9V.
I got a ramp, but is not between the values I hope.