I have need to latch an event, I thought this would be very simple but it is putting up quite a fight! Firstly I tried to make an RS type flip flop from two NOR gates, this refused to latch at all for some reason. I am guessing the async logic is synthesized by use of sync-subcomponents? Anyhow, it really didn't want to play.
So, I tried to hook up a D type flip flop and turn the clock off by means of an AND gate and the negated output of the d-type. (As attached) This seemed to work, right up to the point where I connected the D-type output to the clock input so again it looks like some kinda race condition.
Use preset pin on DFF block to capture wanted event and clear Q pin by setting D-input to 0 position and clocking DFF with control register.