1 Reply Latest reply on Dec 14, 2010 12:40 AM by gautamd_

    SPI TX Buffer Question, SPI "Done" Transmitting?

      Hopefully this code snippet is enough information...


      txBuffCount = SPIM_1_GetTxBufferSize();


      Why does GetTxBufferSize() return 0??  I've got an 8-byte buffer and I'm writting 9 bytes here, but no matter...the 0xFF writes were because it was returning 0 even with a 5-byte write


      I'm using software-controlled chip-select for this project and am running into issues with figuring out when my transmission is really done.  I'm trying this -


      while(SPIM_1_GetTxBufferSize() != 0)    //wait on empty buffer
      while((SPIM_1_ReadTxStatus() & SPIM_1_STS_SPI_DONE) != SPIM_1_STS_SPI_DONE);    //wait on empty FIFO


      The reason I'm not just using the SPIM_1_STS... like in the 2.0 datasheet example code is because I have an 8 byte receive buffer and interrupts that are running "under the hood" to transfer that data from the FIFO to the buffer are coming in occasionally and slowing my code down while the SPI master keeps transmitting.  That is, I was having trouble with the FIFO emptying out during an ISR from the receive array, even though more transmit data was still in the buffer.  The SPIM_1_STS... line ended up returning a FALSE and exiting, letting my software chip select go high when it shouldn't. 

        • 1. Re: SPI TX Buffer Question, SPI "Done" Transmitting?





          When "SPIM_WriteTxData( )" function is called one after the other, it wont be executed until the previous data byte is transmitted. Hence it acts as a Blocking statement, except for the last "SPIM_WriteTxData( )" statement which requires polling method to check if the data is completely transmitted.


          The "GetTxBufferSize( )" function returning 0 indicates that the transmission is completed and there are no remainiing bytes waiting to be transmitted.


          Can you please let us know the frequency of operation of the SPI? That is, the Sclk output Frequency?


          As you have mentioned, the ISR is running in the background during transmission when the size of the Tx Buffer is greater than 4. Same is the case with the Receive Buffer when its size is greater than 4. This results in an overhead and the Bus clock Frequency too comes into picture, which determines whether the ISR is being handled when required.


          Here are a few suggestions which you can incorporate in your design:


          1) Always ensure that the number of bytes written to the Tx Buffer is not greater than the size of the Tx Buffer allocated.


          2) Set the Bus Clock to higher Frequency, which is an integral multiple of your SPI Frequency. Example- Set Bus Clock frequency to 48MHz, if your SPI Sclk is 2MHz or 4MHz.


          3) If you are using SPI Slave on PSoC, then make sure that the MOSI and SCLK pins are unsynchronized (By unchecking the "Input Synchronized" option in the Configuration Box of the pin.




          Let us know if this helped.