Hi All,
I am currently trying to interface a Texas Instruments ADS8328 16-bit A/D chip to my CY8KIT-001 (running a PSoC5 processor module), and am having trouble with the SPI communications between the two.
The PSoC5 uses a 16-bit SPIM component operating in mode 2 at 12Mhz, with MISO + MOSI, and MSB first. I am able to write initial configuration data from the PSoC5 (master) to the ADS8328 (slave) without a problem. However, when I try to read the configuration word back, the PSoC5 consistently fails to clock in the last bit.
So for example, lets say I send the initial configuration word "0xE6FD" to the ADS8328. In order to read that configuration word back out, I then send the word "0xC000" to the ADS8328, and look to see what arrives in the FIFO read buffer. I have included the function I call to perform this below:
void ADS8328_Initialise(int8* ErrorCode)
{
SPIM_1_Start();
uint16 RegisterRead = 0; // Used for read/write
// error checking.
uint16 RegisterWrite = 0xE6FD; // Manual channel select,
// tag bit disabled.
SPIM_1_WriteTxData(RegisterWrite); // Write CMR/CFR data.
while ((SPIM_1_ReadTxStatus() & SPIM_1_STS_SPI_DONE) != SPIM_1_STS_SPI_DONE)
{
// Wait for CMR/CFR data to be written.
}
if (DEBUG)
{
RegisterWrite = 0xC000; // Read CFR data.
SPIM_1_ClearFIFO(); // Clear FIFO buffers.
SPIM_1_WriteTxData(RegisterWrite); // Write CMR data.
while ((SPIM_1_ReadTxStatus() & SPIM_1_STS_SPI_DONE) != SPIM_1_STS_SPI_DONE)
{
// Wait for CMR data to be written.
}
while (SPIM_1_GetRxBufferSize() == 0)
{
// Wait for CFR data to arrive in buffer.
}
RegisterRead = SPIM_1_ReadRxData(); // Read buffered CFR data.
RegisterRead &= 0x0FFF; // Mask CMF data.
RegisterWrite = 0x06FD;
if ((RegisterRead - RegisterWrite) != 0)
{
*ErrorCode = -1;
}
}
}
I have also attached an oscilloscope capture of the DEBUG code below. In it you can see "0xC000" being written to the ADS8328, and it clocking-out the initial configuration word, "0xE6FD", in response. Now, when I look at the content of RegisterRead before it is masked, I find "0x037E", which is correct, except that the LSB is missing. I have tried checking the FIFO buffer to see if the last bit was left there "by accident", with no joy. Is anyone able to shed some light on this situation, as I must admit that it has me stumped!
Regards
- R
