1 Reply Latest reply on Feb 4, 2011 1:04 AM by daniel.o'connor

    GPIF isochronous in problem

    daniel.o'connor

      Hi,

         

      I have developed a device to read data from our radar DAQ chassis but I am having some latency problems. I was using bulk transfers (EP2 quad buffered 512 bytes) and I am now trying to use iso transfers instead (EP2 double buffered 1024 bytes).

         

       

         

      I use the GPIF to read from the 96kbyte FIFO in the DAQ, and this worked fine when I was using a bulk EP, however now that I have switched to iso it doesn't do anything. My code triggers a GPIF FIFO read but nothing happens apart from the GPIF saying it's busy.

         

      The GPIF FIFO read is just.

         

       

         
      // GPIF Waveform 2: FIFO Rea                                                                //                                                                                         // Interval     0         1         2         3         4         5         6     Idle (7)  //          _________ _________ _________ _________ _________ _________ _________ _________ //                                                                                          // AddrMode Same Val  Same Val  Same Val  Same Val  Same Val  Same Val  Same Val            // DataMode NO Data   Activate  Activate  Activate  Activate  Activate  Activate            // NextData SameData  SameData  SameData  SameData  SameData  SameData  SameData            // Int Trig No Int    No Int    No Int    No Int    No Int    No Int    No Int              // IF/Wait  Wait 3    IF        Wait 1    Wait 1    Wait 1    Wait 1    Wait 1              //   Term A           QTR                                                                   //   LFunc            OR                                                                    //   Term B           IntReady                                                              // Branch1            ThenIdle                                                              // Branch0            ElseIdle                                                              // Re-Exec            No                                                                    // Sngl/CRC Default   Default   Default   Default   Default   Default   Default             // REQ          0         1         1         1         1         1         1         1     // CTL1         0         0         0         0         0         0         0         0     // CTL2         0         0         0         0         0         0         0         0     // CTL3         0         0         0         0         0         0         0         0     // CTL4         0         0         0         0         0         0         0         0     // CTL5         0         0         0         0         0         0         0         0       So there's no decision state to stall on or anything.  Anyone have any clues?