Can you please throw more light on your setup. Are you enabling Internal Buffer in the Delta Sigma ADC?
It will be helpful to analyze if you can attach the project.
I've tried both with buffer bypassed and rail-to-rail. And with and without external bypass (that I added on FirstTouch board) of Vref. Please find attached this part of my project.
004123-ASB.cydsn.zip 2.1 MB