6 Replies Latest reply on Apr 11, 2011 10:25 PM by sandra.milena

    SC BLOCK TYPE

    manuel.julian.moron
              I'm programming an CY8C24994 PsOC chip.   
      The datasheet only tell us the following:   
         
      "    For the CY8C26/25xxx family of devices, the SCBLOCK is formed with either an "A" or "B" type SC PSoC block. For the other PSoC devices, the SCBLOCK is formed with either a "C" or "D" type SC PSoC block. "   
      How I know if when I'm selecting an SC block I'm using an tipe C or D ?   
         
      By the way, I can see I have available two bus comparator which I can enable with CompBus Properties in PsOC Designer.   
      It carry the output signal of my SCBlock to one of the Comparators but, but there's only one input. In which Block is placed the comparator and where's the other imput to the comparator?   
         
      Thanks for your time.   
      Regards.   
        • 1. Re: SC BLOCK TYPE
          graa
                  The SC blocks are named as ASCxx and ASDxx in the device editor view. ASC is C type block and ASD is D type block.   
             
          Use a CMPPRG user module (under the Amplifier user module category) to use the comparator. Place it in a CT block (ACB00 or ACB01). The CMPPRG user module will connect to the Comparator bus in the analog column.   
          • 2. Re: SC BLOCK TYPE
            manuel.julian.moron
                    I see.   
            OK, but the logic operation made, i.e logic NAND   
            between comparator bus0 and comparator bus1 goes to a label   
            called Comparator 0. Does it goes to CMPPROG placed in CT ACB00?   
               
            By the way, I don't understand perfectly the Ref_Mux implications.   
            I have read the Thecnical ref Manual and The IDE Users Guide.   
            I know it define the ADC range and the opamp range but I'm not sure   
            how to select the best option. It talks about the BandGap.   
               
            It seems to be available into the datasheet, but I can't find it.   
               
            Finally, Do we can be confident with the internal clocks?   
               
            Thanks you, I see the light.   
            I understand finally the PsOC Designer.   
            • 3. Re: SC BLOCK TYPE
              graa
                      The output from the ACB00 will go the the Comparator bus of that Analog column. The output from the 2 SC blocks of the column also can be connected to the comparator bus.   
                 
              If no logical operation is performed on the LUT, then this output will be directly available on the Comparator Bus 0 net. This net is available as the Enable and Clock input to the Digital blocks.   
                 
              You will have to select the RefMux according to the input signal you want to measure. The reference should be selected in such a way that it fits your input signal. If you want to measure a unipolar signal in the range of VSS to VDD, then you will use a RefMux Vdd/2 +/- Vdd/2. If you have a +/-1V signal to be measured, then you can select Vdd/2 +/- Bandgap. In this, the AGND will be at Vdd/2 and the range of ADC would be +/-1.3V around AGND. So, this will be very close to your input signal.   
                 
              Can you elaborate about "confident with internal clocks"? Do you mean the accuracy of the clocks?   
              • 4. Re: SC BLOCK TYPE
                manuel.julian.moron
                        Where is the LUT?   
                I put a CMPPRG but I cant take the Comparator Bus as an input.   
                Moreover, where is the Comparator 0 and 1 labeled by the Designer?   
                   
                I refer to the precision of the clock's how you said.   
                • 5. Re: SC BLOCK TYPE
                  graa
                          You can find the LUT at the top end of each comparator bus. There is a square box at the end of each comparator box. Clicking on this box will provide you with 16 logical operations which you can perform with adjacent comparator bus.   
                     
                  The Comparator Bus 0 or 1 is available as input in the Digital blocks. For example, if you place a counter in a digital block, you can select one of the Comparator buses as the Enable input.   
                     
                  The accuracy of the 24MHz SysClk is 2.5% in most of the devices. In some devices it is 4%. You can refer the particular device data sheet and get this information from the Electrical Characteristics section.   
                  • 6. Re: SC BLOCK TYPE
                    sandra.milena

                     I'am make the pid controller, i need reconfigure los registros  CRO, CR1 , CR2 and CR3, but i don´t make by programming is this assing the register value net by uart, i help need, thanks