3 Replies Latest reply on Sep 18, 2014 12:12 PM by seyhan

    memory map reconfiguration for STM32F401

    chelseablue1905

      HI,ALL:

           I want to increase bootloader size,and i modify bootapp_link.ld bootloader_link.ld dct_link.ld and dct_only_link.ld  as follows:

      MEMORY

      {

          BTLDR_VECTORS          (rx)  : ORIGIN = 0x08000000, LENGTH = 512

          BTLDR_API                     (rx)  : ORIGIN = 0x08000200, LENGTH = 512

          BTLDR_CODE                 (rx)  : ORIGIN = 0x08000400, LENGTH = 31K

          DCT1_FLASH                  (rx)  : ORIGIN = 0x08008000, LENGTH = 16K

          DCT2_FLASH                  (rx)  : ORIGIN = 0x0800C000, LENGTH = 16K

          APP_HDR                        (rx)  : ORIGIN = 0x08010000, LENGTH = 512

          APP_CODE                      (rx)  : ORIGIN = 0x08010200, LENGTH = 0x6FE00

          SRAM                               (rwx) : ORIGIN = 0x20000000, LENGTH = 96K

      }

      and modify stm32f4xx_platform.c file about DCT operate:

       

      #define PLATFORM_DCT_COPY1_START_SECTOR      ( FLASH_Sector_2  )

      #define PLATFORM_DCT_COPY1_START_ADDRESS     ( DCT1_START_ADDR )

      #define PLATFORM_DCT_COPY1_END_SECTOR        ( FLASH_Sector_2 )

      #define PLATFORM_DCT_COPY1_END_ADDRESS       ( DCT1_START_ADDR + DCT1_SIZE )

      #define PLATFORM_DCT_COPY2_START_SECTOR      ( FLASH_Sector_3  )

      #define PLATFORM_DCT_COPY2_START_ADDRESS     ( DCT2_START_ADDR )

      #define PLATFORM_DCT_COPY2_END_SECTOR        ( FLASH_Sector_3 )

      #define PLATFORM_DCT_COPY2_END_ADDRESS       ( DCT1_START_ADDR + DCT1_SIZE )

       

       

      if i modify like this the app can't run,bu moidfy as follows ,the app will work.

      MEMORY

      {

           BTLDR_VECTORS             (rx)  : ORIGIN = 0x08000000, LENGTH = 512

           BTLDR_API                         (rx)  : ORIGIN = 0x08000200, LENGTH = 512

           BTLDR_CODE                    (rx)  : ORIGIN = 0x08000400, LENGTH = 15K

           DCT1_FLASH                      (rx)  : ORIGIN = 0x08004000, LENGTH = 16K

           DCT2_FLASH                      (rx)  : ORIGIN = 0x08008000, LENGTH = 16K

           APP_HDR                             (rx)  : ORIGIN = 0x0800C000, LENGTH = 512

           APP_CODE                          (rx)  : ORIGIN = 0x0800C200, LENGTH = 0x73E00

          SRAM                                    (rwx) : ORIGIN = 0x20000000, LENGTH = 96K

      }

       

      STM32F401xD/E Flash module organization table

      捕获.PNG

        • 1. Re: memory map reconfiguration for STM32F401
          seyhan

          Hi,

           

          I will try to duplicate your issue.

           

          -Seyhan

          • 2. Re: memory map reconfiguration for STM32F401
            chelseablue1905

            In project wiced-sdk-2.4.1,this issue cause by STM32F401 UART flash tool,data was write to error address.But in project WICED-SDK-3.1.0,data has wrote to right address,but app can't run.

            • 3. Re: memory map reconfiguration for STM32F401
              seyhan

              Hi,

               

              I have updated an evaluation board with STM32F415 MCU with 31K BTLDR_CODE section.

              Please make below change as well (WICED SDK-3.1.0).

               

              --- a/WICED/platform/MCU/STM32F4xx/WAF/waf_platform.c

              +++ b/WICED/platform/MCU/STM32F4xx/WAF/waf_platform.c

              -#define PLATFORM_APP_START_SECTOR      ( FLASH_Sector_2  )

              +#define PLATFORM_APP_START_SECTOR      ( FLASH_Sector_4  )

               

              -#define PLATFORM_DCT_COPY1_START_SECTOR      ( FLASH_Sector_1  )

              +#define PLATFORM_DCT_COPY1_START_SECTOR      ( FLASH_Sector_2  )

              #define PLATFORM_DCT_COPY1_START_ADDRESS     ( DCT1_START_ADDR )

              -#define PLATFORM_DCT_COPY1_END_SECTOR        ( FLASH_Sector_1 )

              +#define PLATFORM_DCT_COPY1_END_SECTOR        ( FLASH_Sector_2 )

              #define PLATFORM_DCT_COPY1_END_ADDRESS       ( DCT1_START_ADDR + DCT1_SIZE )

              -#define PLATFORM_DCT_COPY2_START_SECTOR      ( FLASH_Sector_2  )

              +#define PLATFORM_DCT_COPY2_START_SECTOR      ( FLASH_Sector_3  )

              #define PLATFORM_DCT_COPY2_START_ADDRESS     ( DCT2_START_ADDR )

              -#define PLATFORM_DCT_COPY2_END_SECTOR        ( FLASH_Sector_2 )

              +#define PLATFORM_DCT_COPY2_END_SECTOR        ( FLASH_Sector_3 )

              #define PLATFORM_DCT_COPY2_END_ADDRESS       ( DCT1_START_ADDR + DCT1_SIZE )

               

              -Seyhan