1 Reply Latest reply on Jul 25, 2011 6:58 AM by udayan.umapathi

    CY8CDVK-001 I/O Voltage limit?

    user_37926942

       Hello,

         

      1) I am working with the CY8C3866AXI-040 (100-TQFP) chip that is the standard module on the PSoC 3 DVK-001. This chip is the production chip. It appears that on my DVK, the Vadj voltage CAN'T be brought lower than 2.0V. Is this part of the design/correct?

         

      2) I want to assess the ability of the PSoC 3's I/Os to reach their stated ability of 1.2V lower range. However, online sources say that this can only go as low as 1.8V. Which is true?

         

      3) Is there any change in slew rate or drive characteristics at lower voltages? Is there anything I should know about this when designing with low I/O voltages?

         

      3) What is the frequency limit on the PSoC 3's I/O pins? I understand that there is a different input/output frequency limit. However, I don't understand why this is, and what the limitations are.

         

      Thanks,

         

      DiodeDan

        • 1. Re: CY8CDVK-001 I/O Voltage limit?
          udayan.umapathi

           1) I am working with the CY8C3866AXI-040 (100-TQFP) chip that is the standard module on the PSoC 3 DVK-001. This chip is the production chip. It appears that on my DVK, the Vadj voltage CAN'T be brought lower than 2.0V. Is this part of the design/correct?

             

          You should be able adjust the VADJ from 1.25 Volt to 4.9 Volt, that is how the regulator is designed to operate on the DVK. You should be able to go below 2 V.

             


          4) What is the frequency limit on the PSoC 3's I/O pins? I understand that there is a different input/output frequency limit. However, I don't understand why this is, and what the limitations are.

             

          GPIO output operating frequency and GPIO input operating frequency are different for PSoC 3. The GPIO input operating frequency for all input voltage ranges is 66 Mhz(same is the case with SIO), However the GPIO output operating frequency varies based on the voltage levels and the information could be found in the GPIO and SIO AC spec table provided in the PSoC3 datasheet.

             

          I will provide a clear answer for the other 2 questions in the next post.