3 Replies Latest reply on Nov 18, 2011 8:13 PM by anand.srinivasan.asokan

    J-link (JTAG) schematics

    nazila.salimi

      Hi,

         

      In DVK schematics, pin 15 (N_SRST) is not connected to any pins of FX3.0. However, in the J-Link datasheet, this pin (RESET) is defined to be connected to target CPU reset signal. Is it ok to leave this pin unconnected?

         

      Thanks,

         

      Nazila