10 Replies Latest reply on Dec 1, 2011 5:36 PM by ki.leung

    ADC in scanning mode

    ezra.ben.senyor

      hi.

         

       

         

      i am trying to create ADC SAR in scanning mode in its full speed and i am having some problems .

         

      the basic idea is to take the analog mux and lut link them to the dma so that every channel will go into differnt buffers so that i have an array of variables that each one represents one channel of measure.

         

      i want to make one swift of all the channels and stop. then start again in software.

         

       

         

      is it possiable?

         

       

         

      i was able to to something but the channels affect one another.

         

       

         

      thanks .

        • 1. Re: ADC in scanning mode
          ki.leung

          There is a bug in SAR ADC which may affect mutiplexing scan of analog signal.  Wait for the next PSoC creator release or issue a case in Cypress, they should be able to tell you the work around.

          • 2. Re: ADC in scanning mode
            ki.leung

            That bug may not be the source of your problem, but just to let you know that there is a issue using SAR ADC in scanning using multiplexer.

            • 3. Re: ADC in scanning mode
              ezra.ben.senyor

              HI.

                 

               

                 

              thanks for the replay where can i see the issue?

              • 4. Re: ADC in scanning mode
                ki.leung

                 I thihk hey should come up with a fix when they release 0SoC creator 2. unless you are in a hurry, I suggest you wait for that release.

                • 5. Re: ADC in scanning mode
                  udayan.umapathi

                  ADC data buffering using DMA with minimum CPU intervention

                     

                   

                     

                  This is one of things that I did with PSoC3 Delsig ADC. The explanation for the same is provided below. I think a similar design should be possible for SAR ADC.

                     

                  Four analog channels are being scanned using Analog Hardware Mux that is connected to ADC. ADC is configured to have SOC terminal. DMA is configured to transfer the data from ADC OUTSAMP register to some SRAM buffer. Two buffers are used to accumulate ADC data. And they are filled sequentially one after the other and in a cycle. Two TDs are configured accordingly to transfer to the above mentioned buffers and they are chained. The DMA transfer is initiated by a trigger from ADC EOC. DMA is configured to require a “request for every burst”, this request is provided by EOC of ADC when there is valid data sample available. Each TD in this case is configured to transfer, 4*number of Adc bytes (number of Amux channels* ADC resolution/8). The Amux channel switching for every ADC conversion is achieved using an LUT which is clocked by EOC. The EOC is passed through a SYNC component and synchronized to BUS_CLK(which is very high). Once a TD transfer is complete the termout signal triggers an ISR to set a flag to indicate complete of one complete scan. The next TD transfer is initiated and the process continues.

                  • 6. Re: ADC in scanning mode
                    ezra.ben.senyor

                    hi .

                       

                     

                       

                    thanks for all your replays .

                       

                     

                       

                    i tried doing it somehow like in "EP64560" but still one measure changes the other.

                       

                    where can i see the discription of the issue?

                       

                    the exaple that is "U2" is showing is in delta sigma but as i understand the problem is with SAR.

                       

                    thanks.

                    • 7. Re: ADC in scanning mode
                      ezra.ben.senyor

                      i have added what i did according to the "EP64560" example.

                         

                       

                         

                      one measure affects the other.

                      • 8. Re: ADC in scanning mode
                        ki.leung

                        The issue is with SAR ADC only. The problem will not show up if the ADC is not used for multiplex input. We found it during our project development and takes a while to have the root source identifed. The fix is simple, but I do not have it here. 

                           

                        For example if you scan 4 channels and store in in an array ADCdata[4];

                           

                        By fixing all input to a fix level. pick any one channel (except the last one). Say if you pick channel 1, input a different level, see you the new value shown in ADCdata[1] (ie the register for channel 2). if that is that case, you are affected by this problem. However, if it changes correctly in ADCdata[0], than you are not affected.

                           

                        If you are affected, create a case and Cypress should be able to identify if the fix works with your application.

                        • 9. Re: ADC in scanning mode
                          ezra.ben.senyor

                          hi.

                             

                           

                             

                          thanks for your replay .

                             

                           

                             

                          what you described is exactly our problem.

                             

                          i have opend acase in Cypress but no responce yet.

                             

                           

                             

                          can you tell me what was the Fix for you?

                          • 10. Re: ADC in scanning mode
                            ki.leung

                            Try the following

                               

                            /* Do this in your initialization routine */
                            /* you only need to do it once after ADC_Start */

                               

                             /* Start the ADC */
                             ADC_Start();
                             ADC_SAR_CSR0_REG |= ADC_SAR_RESET_SOFT_ACTIVE;
                             CyDelayUs(2);
                             ADC_SAR_CSR0_REG &= ~ADC_SAR_RESET_SOFT_ACTIVE;

                               

                            Cheers