10 Replies Latest reply on Apr 23, 2015 2:39 AM by @gmail.com

    about SD clk

    @gmail.com

       Hello

         

      I test a simple Read/Write action using FX3S FPGA Dev Board.

         

      I use a two SD cards. one is Class 10 another is UHS-1.

         

      I test Read test a big file (about 1GB) , these cards are almost same performace. 

         

      In the Desktop PC. these cards performace difference is about 150% 

         

      (Class 10 card : 20 MB/s, UHS-1 : 33 MB/s)

         

      I have some question.

         

      Can I improve a performace on UHS-1 card ?

         

      I set a 104MHz on SD CLK, but The CLK works 48MHz.

         

      I change a CLK to 20Mhz, 26Mhz, 52Mhz, 104Mhz.

         

      the CLK working 18Mhz, 24Mhz, 48Mhz, 48Mhz

         

      Why 52MHz and 104Mhz are same CLK?

         

      and can I improve a CLK over 48Mhz ?

         

       

         

      Thank you

         

      Regards.

        • 1. Re: about SD clk
          Madhu Lakshmipathy

           Hi,

             

          To get full clock, pls set useDdr = CyFalse in CyU3PSibSetIntfParams API.

             

          Also, pls make sure that your VIO2 / VIO3 power domain (which ever is for UHS card) is 1.8V.

             

          To increase the performance:

             

          Set the Write Commit Size to a bigger value using the CyU3PSibSetWriteCommitSize .API. Also, try to write / write more number of blocks in a single shot by increasinfg the numBlocks paramater in the CyU3PSibReadWriteRequest API.

             

          (If you are following the above recommendations, please increase the write timeout value using the CyU3PSibWriteTimerModify API, to avoid timeout errors. The defalut value is 5000 i.e 5 seconds)

             

          Regards,

             

          - Madhu Sudhan

          • 2. Re: about SD clk
            @gmail.com

             Hello,

               

            I appreciated your reply but I still don't solve it.

               

            I set a SDR mode - to set useDdr in CyU3PSibIntfParams_t - .

               

            and I set a 1  VIO2 / VIO3 power domain  to 1.8V using GPIO pin control (#45, #57)

               

            I checked what VIO2/VIO3 is 1.8V.

               

            I start my firmware. Dev board doesn't recognized SD card fatition. so I check SD clk. The clk runs a 400Khz only. 

               

            The clk Amplitude is 1.8V.

               

            so I change a code lowVoltage in 'CyU3PSibIntfParams_t' to 'CyTrue' and rerunning my firmware, 

               

            Firmware is not work. because 'CyU3PSibSetIntfParams' function result is fail.

               

            What I miss it??

               

             

               

            Thank you.

               

            Regards.

            • 3. Re: about SD clk
              Madhu Lakshmipathy

               Hi,

                 

              What is the error code returned by CyU3PSibSetIntfParams API? Have you enabled the GPIOs 45 and 57 before calling this API?

                 

              Regards,

                 

              - Madhu Sudhan

              • 4. Re: about SD clk
                @gmail.com

                 Hello.

                   

                I set GPIOs before calling CyFxFatFsAppSibInit() included CyU3PSibSetIntfParams API.

                   

                and Error Code is CY_U3P_ERROR_BAD_ARGUMENT

                   

                Thank you.

                • 5. Re: about SD clk
                  Madhu Lakshmipathy

                   Hi,

                     

                  Can you attach the code here?

                     

                  Regards,

                     

                  - Madhu Sudhan

                  • 6. Re: about SD clk
                    @gmail.com

                     Hello

                       

                    This is a source code.

                       

                    Thank you.

                    • 7. Re: about SD clk
                      Madhu Lakshmipathy

                       Hi,

                         

                      I checked the code.

                         

                      Please make intfParams.voltageSwGpio = 45;

                         

                      (also make it 57 for port 1).

                         

                      if you set this to 0xFF, then you would be getting the BAD_ARGUMENT error, provided you have set intfParams.lowVoltage = CyTrue;

                         

                      Regards,

                         

                      - Madhu Sudhan

                      • 8. Re: about SD clk
                        @gmail.com

                         Hello

                           

                        Thank you for your reply. It was Great Help to me.  I make my code for your adivce. The board works pretty well. Until I push RESET switch(SW9).

                           

                        I turn on the board. and I download FAT32 test program.  I check a FREQ on SD CLK. The CLK runs 100MHz.

                           

                        and I push a RESET button. and I download test program again. The CLK runs 50MHz.

                           

                        I guess different way to boot the PWR on and push RESET.  I don't konw what is different thing.

                           

                        Do you have solution that happen??

                           

                        Thank you

                           

                        Regards.

                        • 9. Re: about SD clk
                          Madhu Lakshmipathy

                           Hi,

                             

                          When you are resetting the board without power cycling the SD Card (turning SD Card's 3.3 V power supply ON and OFF), the frequency becomes half.

                             

                          The start up sequence of SD Card as per SD specification is affected when firmware reload is done without power cycling the SD Card.

                             

                          In your final design, please make sure that resetting the board also power cycles the SD Card.

                             

                          Regards,

                             

                          - Madhu Sudhan

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                          • 10. Re: about SD clk
                            @gmail.com

                             Thank you very much !