2 Replies Latest reply on Jan 19, 2012 12:18 AM by prajith.cheerakkoda

    redundant SYNCDELAY in firmware examples

    arturas.isajenko

      Hi,

         

      I am trying to speed up my FX2 firmware and trying to clean up the code. I found that SYNCDELAY macro is used very often in my code and also in firmware examples given by Cypress. For example, code below is taken from C:\Cypress\Cypress Suite USB 3.4.7\Firmware\Bulkloop\bulkloop.c

         
        ...   EP2CFG = 0xA2;   SYNCDELAY;                       EP4CFG = 0xA0;   SYNCDELAY;                       EP6CFG = 0xE2;   ...
         

      As far as I understand from TRM sections 15.15, such a delay should be used in situation when you write some register A then read/write other register B and register B depends in some way on register A. This delay just gives a time for internal hardware to "catch" new value & update all others that depend on it.

         

      So in the given example because we only write registers, there is no need for such delays, right? Please correct me if I am wrong.

         

      Best regards, Arturas

        • 1. Re: redundant SYNCDELAY in firmware examples
          prajith.cheerakkoda

           Hallo,

             

                  Yes, here no delays are required.

             

           

             
            EP2CFG = 0xA2;   SYNCDELAY;                       EP4CFG = 0xA0;   SYNCDELAY;                       EP6CFG = 0xE2;    But keep in mind delay is required between a write to any register in  the 0xE600-0xE6FF range and a write to one of the registers in Table 15-20 of TRM.

             

           

             

          Thanks

             

          Prajith

          • 2. Re: redundant SYNCDELAY in firmware examples
            prajith.cheerakkoda

             Hallo,

               

                    Yes, here no delays are required.

               

             

               

                  EP2CFG = 0xA2;SYNCDELAY; EP4CFG = 0xA0; SYNCDELAY; EP6CFG = 0xE2;

               

             

               
            But keep in mind delay is required between a write to any register in  the 0xE600-0xE6FF range and a  write to one of the registers in Table 15-20 of TRM.  Thanks, Prajith