Yes, sorry, pasting error. Since I can't edit my previous response I'll repost in case someone else reads this:
I definitely agree with your assessment that "I don't think that using the primary firmware mapping of P12/P11 will conflict with P26/P27". But the secondary mapping (XTALI32K,XTALO32K) is the issue here.
I cannot tell from the table you pasted in your last message if configuring pins 43,44 as XTALO32K and XTALI32K (by disabling those GPIOs and invoking rtc_init()) would prevent using pins 42,1 as P26 and P27.
If that was the case, I would expect to see that fact mentioned in the documentation for pins 42 and 1, or elsewhere on that same document. I suspect this is a documentation error carried over from the SOC datasheet, which does have those conflicts and properly documents them.
As a follow up to the dialog over the weekend, I wanted to update/confirm with you a few items I learned/verified today (I may have to span this across the multiple threads that are open).
Regarding our discussion above of logical pins/GPIOs assigned to the External Oscillator function and any conflicts those pins would have on logical pins P26/P27:
Using the primary firmware mapping of P12/P11 will NOT conflict with P26/P27. However, if you are using the secondary mappings and calling/configuring the GPIO using XTALI32K,XTALO32K, these will definitely conflict and cause issues.
Please confirm that you are indeed using P11/P12 and not using XTALI32K/XTALO32K.
Thanks for following up. We are using an external clock connected to XTALI32K/XTALO32K. We are also using P26 and P27 as a gpio input and output respectively. So it appears that we will have a conflict with our board if we attempt to use the external clock.
It turns out that we'll need to do another prototype iteration because of this. I would strongly recommend that Broadcom clearly documents this conflict in CYW20736S Bluetooth Low Energy SiP Module Technical Reference . Table 2 on that document only mentions 'P27' as an "Alternate function" for physical pin 44, but no mention is made in the description of physical pin 1 (logical P27).