8 Replies Latest reply on Mar 28, 2012 9:15 AM by user_62908756

    UART and Tx interrupts

    user_62908756

      Hi,

         

       I'm using a UART, full duplex, 19200, 8,N,1 RS485 enable hard control. I've enable interrupts for Rx and Tx. Rx int works perfectly, but I've problem with Tx ints (and it's possible I don't understand something). Buffer is 4 bytes, so no internal ints are available. If I've marked trigger ints on "fifo empty" and/or "fifo not full" no ints are generated. The only way to produce ints is if I've marked "Tx complete" (in debug, I see the register and bits change). But I think this is a bit silly: this kind of interrupt is useful (very) if you have to do a RS485 control via soft and in combination of previous. If you are using hardware control or no use RS485, it's more logic use combination of other two ("empty" or "not full").

         

      Can someone explain this behavior? 

        • 1. Re: UART and Tx interrupts
          user_1377889

          The interupts are INTERNAL interrupts. When you use a buffer that is greater than the internal FiFo (4) interrupts become enabled to transfer the data between the memory and the FiFo.

             

           

             

          The interrupts on Tx and Rx which you can check are transferred to the outputs and will work as usual, connect an ISRcomponent to it or use it as hardware (you even may connect a DMA to it!).

             

          The APIs provide string-transmit functions so that you do not have to care for anything, provided the bufferrs are large enough.

             

          Happy coding

             

          Bob

          • 2. Re: UART and Tx interrupts
            user_62908756

            Hi,

               

            I've these point clear: Interrupts are internal and they are not triggered if you have less than 4 bytes

               

            So the question is (with less or equal of 4 bytes):  are ints on Tx triggered by any (OR of all checked) of the cases marked (i.e.: on FIFO empty, on FIFO not empty) or is triggered only with on Tx Complete (and you have marked, of course)?

               

            Saludos-Regards

               

            Gil

            • 3. Re: UART and Tx interrupts
              user_1377889

              "The tx_interrupt output is the logical OR of the group of possible interrupt sources. This signal goes high while any of the enabled interrupt sources are true." the datasheet tells. Same applies for Rx Interrupt.

                 

              Bob

              • 4. Re: UART and Tx interrupts
                user_62908756

                Exactly ! we just arrive to the problem: if I have marked as interrupt source "on FIFO Empty" and "On FIFO not FULL", and you want to send "Hello world", at low baudrate (i.e 300 bds) to see the effect, in theory, "H","e","l","l" should be in the UART quickly (you enter "H" and immediately you have a interrupt due "FIFO is no full" , so you enter "e", and so on until to enter second "l").When "H" is transmitted completely, "e" pass to be transmitted and there is a room of 1 byte, so, you have another interrupt and you put "o" in the FIFO.

                This is in theory, because in my test, no interrupts are generated. Only if I've marked "on TX complete" as interrupt source, I have them. Why?
                 

                • 5. Re: UART and Tx interrupts
                  user_1377889

                  What did you connect to the interrupt lines ? A ISR-module? Did you clear the interrupt with a UART_ReadTxStatusRegister()?

                     

                  Probably it would be fine, if you upload your project here. to do so, Build->Clean Project then File->Create Workspace Bundle(minimal) and Upload the .Zip-File.

                     

                  It's here 23:00h, I'll have a look at in 8-10 hours again.

                     

                   

                     

                  Bob

                  • 6. Re: UART and Tx interrupts
                    user_78878863

                    I think that the _on_fifo interrupts are more designed to use when the buffer is set to more than 4 bytes. Try to use the ON_TX / ON_RX interrupts, they should work fine.

                    • 7. Re: UART and Tx interrupts
                      user_1377889

                      A contraire! I think, the on:Fifo interrupts need to be used when the buffersize is less than or equal to 4. When larger than 4, the internal interrupts become enabled and all the necessary processing is done by the int-routine.

                         

                      Remember: The on_anything checkboxes enable an output of the UART-module which is NAMED interrupt, but does not perform any interrupt-typical task, it is just an output-signal. The user (we) have to connect an Isr-module to that pin and handle everything ourselfs including (!!!) resetting the physical int-output by reading the status (Rx or Tx).

                         

                       

                         

                      Bob

                      • 8. Re: UART and Tx interrupts
                        user_62908756

                        Hi,

                        sorry the delay to put the soft. There is two projects, one called "no_working" and the other called "working". The difference it's the way of to generate the interrupt

                        - not working has checked "On FIFO empty" and "On FIFO not Full".

                        - Working only "On Tx_Complete".

                        to see the result, I use the hyperterminal.

                        "Not working" only put "T" in the transmission and no more appear.

                        "Working" send each 1 second the famous sentences.

                        P.S: forget issue of 19200. it's configurated at 57600 (issues of copy paste, he,he)
                        change *.COMP to *.ZIP