Looking into this with the Apps team. I noticed that when I look at the 20736/7S datasheet, logical pin P15 maps to physical pin 41? Physical pin 31 as indicated on the schematic is mapped to logical pin P2 in the datasheet (this is noted as SPI_CS (slave only) for SPI_2. I'm also not sure if R31 is populated. Will check and find out more or ask someone from the apps team to respond.
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> At this point it is unclear why we would connect the "P15" to VDDIO directly, is it possible to clarify the intention behind this design?
Most sample applications use P15 for battery level measurement. So this is an input to one of the ADC channels.
> Second point, and problbly the most important, is that the Spiffy2 Master sample code in WICED-Smart-Hardware-Interfaces.pdf, page 9 sets P15/PORT 0 as CS.
Yes, this will be a problem on the tag. Having said that, the sample apps that come with the SDK don't use P15 and use P14 instead.
Thanks for the answer, I think the topic is covered.