1 Reply Latest reply on Apr 23, 2012 3:35 AM by anand.srinivasan.asokan

    SlaveFifoSync Mode,Flag A always be asserted when the data quantity is about 17MB/s

    guo.xiaolong

       I use the FX3 in SlaveFifoSync Mode to transfer data from FPGA to PC. The PC End software is the "Streamer" Demo in SDK1.0.

         

      I set the parameters as follow:

         

       

         
           CY_U3P_DMA_TYPE_AUTO   
          Burst length = 0x0F; Buffer size = 16K; Buffer count = 8.   

       

         


      When the data send by FPGA is about 17MB/s,

         


      I think the USB transfer speed is quickly enough, the Flag A(indicate buffer full) would not be asserted, but actually I found the Flag A is sometimes be asserted, It indicated the DMA buffer is full which it would be not! 

         

      What are the possible reasons? Is that the "Streamer" read too slow? But when I use the "Bulksourcesink" Demo to test the USB speed, It can reach 320MB/s.