2 Replies Latest reply on May 11, 2012 9:50 AM by marshall.sharpe

    CyUSB.dll - CyUSBEndPoint.XferData


      Hello everyone,




      I'm looking to test out my GPIF II interface which connects to an external FPGA via the p-port.  I am using the FX3 as a master, synchronous communication, an 8 bit address bus, and a 32 bit data bus.  My firmware is a modifed version of the "SlaveFifoSync" example, and uses DMA channels for data transfer, with bulk out endpoint set as 0x01 and bulk in endpoint as 0x81.




      Using the "USB Control Center" application, I am able to transfer data out to the FPGA using the "Data Transfers" tab for the Bulk out endpoint 0x01.  What I am seeing is separate consectuative bytes being transferred consecuatively.  For example if I send 6 Bytes of data as ""FF AA 55 FF AA 55" i can read the data with the FPGA on the first 8 bits of the data bus.  Attached is a screen shot of the data I sent and the FPGA reading the values.




      I want to be able to send chunks of data 32 bits in length, instead of only 8 bits.  Is this able to be done using the "CyUSBEndPoint.XferData" class within the CyUSB.dll or should I be using another method?





        • 1. Re: CyUSB.dll - CyUSBEndPoint.XferData

          Seems your firmware is configured for 8 bit data bus. You should be changing the firmware not how  you call XferData().





          • 2. Re: CyUSB.dll - CyUSBEndPoint.XferData

            Thanks for the response,




            My firmware is built off of the "SlaveFifoSync" example firmware.  Within the header file, a symbol is set to configure the data bus width (which I have set to a 32 bit GPIF data bus)




            /* 16/32 bit GPIF Configuration select */
            /* Set CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT = 0 for 16 bit GPIF data bus.
            * Set CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT = 1 for 32 bit GPIF data bus.


            #define CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT (1)




            Within the main() function, the code checks this value and configures the IO matrix accordingly:




            #if (CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT == 0)
            io_cfg.isDQ32Bit = CyFalse;
            io_cfg.lppMode = CY_U3P_IO_MATRIX_LPP_UART_ONLY;
            io_cfg.isDQ32Bit = CyTrue;
            io_cfg.lppMode = CY_U3P_IO_MATRIX_LPP_DEFAULT;




            I also noticed that within the header file that was created with the GPIF II designer, this symbol showed up again in the "GPIF II configuration register values" section:




            #if (CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT == 0)
            0x000010A7, /* PIB_GPIF_BUS_CONFIG */
            0x000010AC, /* PIB_GPIF_BUS_CONFIG */




            I checked my GPIF II header file and noticed that my BUS_CONFIG was set as:




              0x0000016C, /* CY_U3P_PIB_GPIF_BUS_CONFIG */




            I tried inserting the if statement with the register values I found in the example header file, but I am still having the original problem I described with only being able to see 8 bits on my data bus.