PSoC 3/5 internal architecture has separate supply for Analog, Digital and I/O which are through the pins Vdda, Vddd and Vddio respectively. The 4 Quadrants of the Chip can be used with 4 different Vddio levels.
There are also 2 internal 1.8V regulators which provide the digital (Vccd) and analog (Vcca) supplies for the internal core logic.
More information on the power supply system can be found in the Technical Reference Manual at the following link:
Also for optimum use of the Analog block, some Best Practises has to be followed, which are highlighted in these Application Notes:
Thanks a lot for your great help and the articles you show to me are very helpful! But should I ask something more about the analog interface,just like the picture attached?
Because some analog components like ADC,DA and Comp will transfer some data to UDB or CPU through analog interface. And can the analog interface isolate analog and digital entirely,just like photo-couple? If it can't the separation of power supply and GND may be meaningless in some strict conditions.
Thank you very much!
ANAIF.bmp 621.5 K
dasg, can you provide updated links for that two application notes you mentioned? Thanks. Simon
True Galvanic isolation requires transformer, opto, RFID, various technologies to achieve
the isolation normally associated with Glavanic isolation. There have been manufactuers
that have done so thru hybrids and special die technologies, like Analog Devices –
But Galvanic does not imply isolations specs, so you have to look at what’s actually trying
to be achieved. Normally split busses between Analog and Digital do not imply Galvanic,
since the interface grounds ultimately meet.
Hope the info helps, regards, Dana.
The iCoupler devices from Analog might be what you need. In the end, your solution would look like the original one you described (with the opto couplers) - the PSoC cannot replace true galvanic isolation. With the (e.g.) ADuM3000 devices, you can replace 4 opto couplers and can isolate a complete SPI interface.