7 Replies Latest reply on Jul 3, 2012 8:44 PM by ramav_01

    DMA buffers

    lehua.chen

      Hello. In the Slave FIFO example, the dmaCfg.count is set to 2 (Slave FIFO channel buffer counts 2). When the data is transferred from U to P, the data is written to the first buffer at the first time and written to the second buffer at the second time. After that, if the Reading from Slave FIFO (SLRD) is not active, the buffer will be always full and no more data can be written. Once the Reading from Slave FIFO starts, the buffers will be clean and ready for the next transfer. Is my understanding right?

         
              
         
          I also want to use I2S to transfer short command to FPGA, but I can not find such firmware example. Could someone give me some suggestions?   
         
              
         
          Thanks,   
         
          Lehua Chen   
         
              
        • 1. Re: DMA buffers
          ramav_01

          Yes. Your understanding is right.

             

          Coming to other question, I am assuming it is "I2C". Please let me know if my assumption is right.

             

          Thanks,

             

          sai krishna.

          • 2. Re: DMA buffers
            lehua.chen

            Hello, sai Krishna,

               
                Thank you for your reply.   
               
                    
               
                I want to use Slave FIFO to transfer bulk data from FPGA to USB then to PC. The short command is written from the PC to FPGA through I2S. I2C is used as bootloader in my plan. Therefore I want to look for firmware example with I2S.   
               

            Thanks

               

            Lehua Chen

            • 3. Re: DMA buffers
              ramav_01

              Hi Lehua Chen,

                 

              You can use I2C both for loading the programm into RAM and for sending commands to your FPGA. Just the slave address will be different from each other.

                 

              As you know, I2S is generally used for streaming the audio samples.

                 

              Regards,

                 

              sai kirshna.

              • 4. Re: DMA buffers
                lehua.chen

                Hi, sai Krishna,

                   
                    You mean that I can use I2C to loading the firmware to RAM at the begining. When the firmware is running, I can configurate the I2C to receive commands from PC and send them to FPGA. Right? If so, I need to learn through the I2C example.   
                   
                        
                   
                    Thanks,   
                   
                    Lehua Chen   
                • 5. Re: DMA buffers
                  ramav_01

                  Yes. FX3 boot from the I2C EEPROM that is connected to it.

                     

                  When you want to send some command to FPGA from PC, you send a command from PC to FX3 over the control endpoint and then in the firmware you parse it and initiate a I2C read from the FPGA connected to FX3.

                     

                  Regards,

                     

                  sai krishna.

                  • 6. Re: DMA buffers
                    lehua.chen

                    In this case, both E2PROM and two pins of FPGA will be connected to I2C_GPIO[58] (I2C_SCL) and I2C_GPIO[59]( I2C_SDA). Right?

                       

                    Thank you

                       

                    Lehua Chen

                    • 7. Re: DMA buffers
                      ramav_01

                      Right.