When I reread the application note, "USB with VID/PID Options" title got my attention. As I understand from the title, there is a three source to change VID/PID that are I2C eeprom, SPI eeprom and efuse. The efuse seems like custom manufacturing which is not a preferred way.
Therefore without using an eeprom or efuse process, VID/PID can't be changed. Am I right?
The VID/PID option being spoken about is to change just the VID/PID of the device (no firmware).
With USB boot as well you'll be able to change VID/PID i.e. by downloading entire firmware and have firmware handle the descriptor requests. Here is the problem with using the default VID/PID (i.e. using no EEPROM), there is the script download method using which cyusb.sys will download firmware to device bound to it.
If 2 different designs use the default VID/PID and script download method then when they're used in the same PC there is a possibility of cross-downloading for firmware. So designs which want to reduce EEPROM size use a small EEPROM just for VID/PID and then this VID/PID is bound to cyusb.sys plus a script file. The script file will have the firmware to be downloaded it will download that and renumerate.
Rob and Anand,
Thanks, I clearly understand the process now.
Now I am learning usb3.0 and have draw a usb3.0+fpga board.I begin debug,but I encounter a problem.I set PMODE[2:0]=F1F,but I get PMOD[2:0]=111,why？And I find unknow drive(VID=0000,PID=0000),but sometimes I find Cypress USB BootLoader,why?
I cannot still understand it! Ihope to get specific instruction.
Could you please share your board schematics with me.
Did you get them reviewed by any Cypress engineer.
I recently went through a lot of debug regarding latching in PMODE[2:0] on the rising edge of reset.
My design required the ability of software to generate a reset after a certain event occurred (insertion of an SDXC card).
When trying to program the SPI flash, the Cypress was detected as a USB Benica device, PMODE[2:0] = 111, when I had it set to FF1.
I was driving the reset pin with an SN74LVC1G08, an AND gate with 32ma, -32mA totem pole outputs. The edge of reset was too fast, and the device was correctly detected as a USB Bootable device only one in ten resets.
I modified my hardware to use an SN74AHV1G09, open drain AND gate and connected a 100K pull up to +3.3V anda 0.1uF apacitor to ground giving me a nice slow reset rise time.
The device is now correctly detected as PMODE[2:0] = FF1 for programming, a 0F1 from normal operation. Have tested thousands of enumerations and not one Benica.
The data sheet does not specify a minimum rise time, only a minimum pulse width which was being vastly exceeded.
Hope this helps someone else.
Correction, typo, the open drain AND gate was an SN74AHC1G09DBVR SOT23-5.