Input CM range for analog is Vssa to Vdda, so you need to effect a DC offset
into the PGA. One approach just using resistors -
Attached is excel file to calculate R values.
121231.xls 12.0 K
i am not getting the output Sir .......can i get some more solutions for my previous question.....plz......
When you upload the complete project here, we all can have a look at and probably see what's going amiss.
To do so: Build -> Clean Project
File -> Create workspace Bundle(minimal)
and then upload the resulting ZIP here.
Providing the right offset is important in application like this. Else, the output will be clipped.
The operating voltage of the device should be greater than the input/ output of the PGA. Are you operating at 3.3V or at 5V?
As Bob has already mentioned, please upload your project here. It becomes easier to figure out the root cause.
The input CM range of the PGA is
Vdda >= Vin >= Vssa
The output PGA CM range is
(Vdda - .3V) >= Vin X G >= (Vssa + .3V), the .3 is loaded spec, see datasheet for load.
Example, Vssa = 0, Vdda = 3.3, You want a 2.5V Pk-Pk swing on output, your input =
.2V, ground referenced. So to start with your input violates input CM range because it
swings .1 V below ground on negative peak (assuming sinewave), we need to offset the
input or AC couple it to PGA to meet input CM range. To DC offset, hence avoid a coupling
cap, use the prior post R divider to Vdda. To AC couple bias with an R divider from Vdda
to PGAin to Vssa, which biases input such that peak output does not exceed PGA output CM
So G = 2.5 / .2 = 12.5. Closest G = 8 in configurator. If you picked the next higest G the
output of the PGA would be in clipping. Therefore output swing will be 8 x .2 = 1.6V.
Nominally the DC component of the input signal should be offset such that ouput swings
symmetrically about (Vdda - Vssa) / 2 = 1.65 V. You can do this by placing a resistor
divider, on PGA in and AC coupling signal. Or offseting the ground referenced input signal
with a DC offset.
So Vout = G x ( Voff + Vsig), or Voff = Vout/G - Vsig. For Vsig = 0 (output then at Vdd/2),
Voff = Vout/G = Vdd / ( 2 * G) = 3.3 / 16 = ~.21 V. So your divider should set that up as
This then satisifies both input and output CM range of the PGA.
I got output of PGA ....Thank you for all( SIR) your support .....